2019-05-10 03:34:06 +00:00
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// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include <string.h>
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2020-03-03 04:22:41 +00:00
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2019-05-10 03:34:06 +00:00
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#include "esp_attr.h"
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#include "esp_err.h"
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2020-03-03 04:22:41 +00:00
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#include "soc/rtc_wdt.h"
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2019-05-10 03:34:06 +00:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "esp_heap_caps_init.h"
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#include "esp_system.h"
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2019-11-28 01:20:00 +00:00
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#include "esp_flash_internal.h"
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2019-05-10 03:34:06 +00:00
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#include "nvs_flash.h"
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#include "esp_spi_flash.h"
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#include "esp_private/crosscore_int.h"
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#include "esp_log.h"
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#include "esp_vfs_dev.h"
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#include "esp_newlib.h"
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#include "esp_int_wdt.h"
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#include "esp_task.h"
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#include "esp_task_wdt.h"
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#include "esp_phy_init.h"
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#include "esp_coexist_internal.h"
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#include "esp_core_dump.h"
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#include "esp_app_trace.h"
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#include "esp_private/dbg_stubs.h"
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2020-03-03 04:22:41 +00:00
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#include "esp_flash_encrypt.h"
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2019-05-10 03:34:06 +00:00
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#include "esp_clk_internal.h"
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#include "esp_timer.h"
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#include "esp_pm.h"
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#include "esp_private/pm_impl.h"
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2020-03-06 04:59:28 +00:00
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#include "esp_ota_ops.h"
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2020-03-03 04:22:41 +00:00
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#include "sdkconfig.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include "esp32/rom/uart.h"
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#include "esp32/dport_access.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/uart.h"
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#include "esp32s2/dport_access.h"
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#endif
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#include "sys_funcs.h"
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2019-05-10 03:34:06 +00:00
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#define STRINGIFY(s) STRINGIFY2(s)
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#define STRINGIFY2(s) #s
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void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default"))) __attribute__((noreturn));
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void start_cpu0_default(void) IRAM_ATTR __attribute__((noreturn));
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2020-03-03 04:22:41 +00:00
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#if !CONFIG_FREERTOS_UNICORE
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void start_cpu1(void) __attribute__((weak, alias("start_cpu1_default"))) __attribute__((noreturn));
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void start_cpu1_default(void) IRAM_ATTR __attribute__((noreturn));
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#endif //!CONFIG_FREERTOS_UNICORE
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2019-05-10 03:34:06 +00:00
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extern void app_main(void);
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extern esp_err_t esp_pthread_init(void);
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extern void (*__init_array_start)(void);
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extern void (*__init_array_end)(void);
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extern volatile int port_xSchedulerRunning[2];
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2020-03-03 04:22:41 +00:00
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static const char* TAG = "cpu_start";
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struct object { long placeholder[ 10 ]; };
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2019-05-10 03:34:06 +00:00
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void __register_frame_info (const void *begin, struct object *ob);
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extern char __eh_frame[];
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2020-03-03 04:22:41 +00:00
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static void do_global_ctors(void)
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{
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#ifdef CONFIG_COMPILER_CXX_EXCEPTIONS
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static struct object ob;
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__register_frame_info( __eh_frame, &ob );
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#endif
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2019-05-10 03:34:06 +00:00
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2020-03-03 04:22:41 +00:00
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void (**p)(void);
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for (p = &__init_array_end - 1; p >= &__init_array_start; --p) {
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(*p)();
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}
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}
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2019-05-10 03:34:06 +00:00
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2020-02-05 11:57:40 +00:00
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static void do_system_init_fn(void)
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{
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extern esp_system_init_fn_t _esp_system_init_fn_array_start;
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extern esp_system_init_fn_t _esp_system_init_fn_array_end;
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esp_system_init_fn_t *p;
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for (p = &_esp_system_init_fn_array_end - 1; p >= &_esp_system_init_fn_array_start; --p) {
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if (p->cores & BIT(cpu_hal_get_core_id())) {
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(*(p->fn))();
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}
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}
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}
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2020-03-03 04:22:41 +00:00
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static void main_task(void* args)
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2019-05-10 03:34:06 +00:00
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{
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2020-03-03 04:22:41 +00:00
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#if !CONFIG_FREERTOS_UNICORE
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// Wait for FreeRTOS initialization to finish on APP CPU, before replacing its startup stack
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while (port_xSchedulerRunning[1] == 0) {
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;
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}
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#endif
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2019-05-10 03:34:06 +00:00
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2020-03-03 04:22:41 +00:00
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// Now we have startup stack RAM available for heap, enable any DMA pool memory
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#if CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL
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if (g_spiram_ok) {
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esp_err_t r = esp_spiram_reserve_dma_pool(CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL);
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if (r != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "Could not reserve internal/DMA pool (error 0x%x)", r);
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abort();
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}
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}
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#endif
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2019-05-10 03:34:06 +00:00
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2020-03-03 04:22:41 +00:00
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//Initialize task wdt if configured to do so
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#ifdef CONFIG_ESP_TASK_WDT_PANIC
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ESP_ERROR_CHECK(esp_task_wdt_init(CONFIG_ESP_TASK_WDT_TIMEOUT_S, true));
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#elif CONFIG_ESP_TASK_WDT
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ESP_ERROR_CHECK(esp_task_wdt_init(CONFIG_ESP_TASK_WDT_TIMEOUT_S, false));
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#endif
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2019-05-10 03:34:06 +00:00
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2020-03-03 04:22:41 +00:00
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//Add IDLE 0 to task wdt
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#ifdef CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
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TaskHandle_t idle_0 = xTaskGetIdleTaskHandleForCPU(0);
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if(idle_0 != NULL){
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ESP_ERROR_CHECK(esp_task_wdt_add(idle_0));
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}
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2019-06-06 02:57:29 +00:00
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#endif
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2020-03-03 04:22:41 +00:00
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//Add IDLE 1 to task wdt
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#ifdef CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1
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TaskHandle_t idle_1 = xTaskGetIdleTaskHandleForCPU(1);
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if(idle_1 != NULL){
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ESP_ERROR_CHECK(esp_task_wdt_add(idle_1));
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2019-05-10 03:34:06 +00:00
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}
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2020-03-03 04:22:41 +00:00
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esp_spiram_init_cache();
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#endif
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2019-05-10 03:34:06 +00:00
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2020-03-03 04:22:41 +00:00
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// Now that the application is about to start, disable boot watchdog
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#ifndef CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE
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rtc_wdt_disable();
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#endif
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#ifdef CONFIG_BOOTLOADER_EFUSE_SECURE_VERSION_EMULATE
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const esp_partition_t *efuse_partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_EFUSE_EM, NULL);
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if (efuse_partition) {
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esp_efuse_init(efuse_partition->address, efuse_partition->size);
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}
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#endif
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app_main();
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vTaskDelete(NULL);
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}
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2019-05-10 03:34:06 +00:00
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2020-03-03 04:22:41 +00:00
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#if !CONFIG_FREERTOS_UNICORE
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void start_cpu1_default(void)
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{
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// Wait for FreeRTOS initialization to finish on PRO CPU
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while (port_xSchedulerRunning[0] == 0) {
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;
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2019-05-10 03:34:06 +00:00
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}
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2020-03-03 04:22:41 +00:00
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#if CONFIG_APPTRACE_ENABLE
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esp_err_t err = esp_apptrace_init();
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assert(err == ESP_OK && "Failed to init apptrace module on APP CPU!");
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2019-05-10 03:34:06 +00:00
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#endif
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2020-03-03 04:22:41 +00:00
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#if CONFIG_ESP_INT_WDT
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//Initialize the interrupt watch dog for CPU1.
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esp_int_wdt_cpu_init();
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2019-05-10 03:34:06 +00:00
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#endif
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2020-03-03 04:22:41 +00:00
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esp_crosscore_int_init();
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esp_dport_access_int_init();
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ESP_EARLY_LOGI(TAG, "Starting scheduler on APP CPU.");
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xPortStartScheduler();
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abort(); /* Only get to here if FreeRTOS somehow very broken */
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}
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#endif //!CONFIG_FREERTOS_UNICORE
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/*
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* We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
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* and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
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*/
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void IRAM_ATTR start_cpu0_default(void)
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{
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2020-03-06 04:59:28 +00:00
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if (LOG_LOCAL_LEVEL >= ESP_LOG_INFO) {
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const esp_app_desc_t *app_desc = esp_ota_get_app_description();
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ESP_EARLY_LOGI(TAG, "Application information:");
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#ifndef CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR
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ESP_EARLY_LOGI(TAG, "Project name: %s", app_desc->project_name);
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#endif
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#ifndef CONFIG_APP_EXCLUDE_PROJECT_VER_VAR
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ESP_EARLY_LOGI(TAG, "App version: %s", app_desc->version);
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#endif
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#ifdef CONFIG_BOOTLOADER_APP_SECURE_VERSION
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ESP_EARLY_LOGI(TAG, "Secure version: %d", app_desc->secure_version);
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#endif
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#ifdef CONFIG_APP_COMPILE_TIME_DATE
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ESP_EARLY_LOGI(TAG, "Compile time: %s %s", app_desc->date, app_desc->time);
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#endif
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char buf[17];
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esp_ota_get_app_elf_sha256(buf, sizeof(buf));
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ESP_EARLY_LOGI(TAG, "ELF file SHA256: %s...", buf);
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ESP_EARLY_LOGI(TAG, "ESP-IDF: %s", app_desc->idf_ver);
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}
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2019-05-10 03:34:06 +00:00
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2020-03-06 04:59:28 +00:00
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/* Initialize heap allocator */
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2019-05-10 03:34:06 +00:00
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heap_caps_init();
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ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
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esp_err_t err;
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esp_setup_syscall_table();
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2020-03-03 04:22:41 +00:00
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if (g_spiram_ok) {
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2019-05-10 03:34:06 +00:00
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#if CONFIG_SPIRAM_BOOT_INIT && (CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC)
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2020-03-03 04:22:41 +00:00
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esp_err_t r=esp_spiram_add_to_heapalloc();
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2019-05-10 03:34:06 +00:00
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if (r != ESP_OK) {
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ESP_EARLY_LOGE(TAG, "External RAM could not be added to heap!");
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abort();
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}
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#if CONFIG_SPIRAM_USE_MALLOC
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heap_caps_malloc_extmem_enable(CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL);
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#endif
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#endif
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}
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2019-10-04 11:12:01 +00:00
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#ifndef CONFIG_ESP_CONSOLE_UART_NONE
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2019-05-10 03:34:06 +00:00
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#ifdef CONFIG_PM_ENABLE
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const int uart_clk_freq = REF_CLK_FREQ;
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/* When DFS is enabled, use REFTICK as UART clock source */
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2019-06-10 07:07:12 +00:00
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CLEAR_PERI_REG_MASK(UART_CONF0_REG(CONFIG_ESP_CONSOLE_UART_NUM), UART_TICK_REF_ALWAYS_ON);
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2019-05-10 03:34:06 +00:00
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#else
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const int uart_clk_freq = APB_CLK_FREQ;
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#endif // CONFIG_PM_DFS_ENABLE
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2019-10-04 11:12:01 +00:00
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uart_div_modify(CONFIG_ESP_CONSOLE_UART_NUM, (uart_clk_freq << 4) / CONFIG_ESP_CONSOLE_UART_BAUDRATE);
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#endif // CONFIG_ESP_CONSOLE_UART_NONE
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2019-05-10 03:34:06 +00:00
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2020-03-20 12:23:36 +00:00
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#ifdef CONFIG_VFS_SUPPORT_IO
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2019-05-10 03:34:06 +00:00
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esp_vfs_dev_uart_register();
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2020-03-20 12:23:36 +00:00
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#endif // CONFIG_VFS_SUPPORT_IO
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#if defined(CONFIG_VFS_SUPPORT_IO) && !defined(CONFIG_ESP_CONSOLE_UART_NONE)
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2019-05-10 03:34:06 +00:00
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esp_reent_init(_GLOBAL_REENT);
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2019-12-26 07:25:24 +00:00
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const char *default_uart_dev = "/dev/uart/" STRINGIFY(CONFIG_ESP_CONSOLE_UART_NUM);
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2019-05-10 03:34:06 +00:00
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_GLOBAL_REENT->_stdin = fopen(default_uart_dev, "r");
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_GLOBAL_REENT->_stdout = fopen(default_uart_dev, "w");
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_GLOBAL_REENT->_stderr = fopen(default_uart_dev, "w");
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2020-03-20 12:23:36 +00:00
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#else // defined(CONFIG_VFS_SUPPORT_IO) && !defined(CONFIG_ESP_CONSOLE_UART_NONE)
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_REENT_SMALL_CHECK_INIT(_GLOBAL_REENT);
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#endif // defined(CONFIG_VFS_SUPPORT_IO) && !defined(CONFIG_ESP_CONSOLE_UART_NONE)
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2020-06-01 12:39:49 +00:00
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// After setting _GLOBAL_REENT, ESP_LOGIx can be used instead of ESP_EARLY_LOGx.
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2020-03-03 04:22:41 +00:00
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#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED
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esp_flash_encryption_init_checks();
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#endif
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2020-06-01 12:39:49 +00:00
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#if CONFIG_SECURE_DISABLE_ROM_DL_MODE
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err = esp_efuse_disable_rom_download_mode();
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assert(err == ESP_OK && "Failed to disable ROM download mode");
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#endif
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2020-03-03 04:22:41 +00:00
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2020-06-01 12:39:49 +00:00
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#if CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE
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err = esp_efuse_enable_rom_secure_download_mode();
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assert(err == ESP_OK && "Failed to enable Secure Download mode");
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#endif
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2020-03-20 12:23:36 +00:00
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2019-05-10 03:34:06 +00:00
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esp_timer_init();
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esp_set_time_from_rtc();
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2020-03-03 04:22:41 +00:00
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2019-09-13 12:49:11 +00:00
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#if CONFIG_APPTRACE_ENABLE
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2019-05-10 03:34:06 +00:00
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err = esp_apptrace_init();
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assert(err == ESP_OK && "Failed to init apptrace module on PRO CPU!");
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#endif
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2020-03-03 04:22:41 +00:00
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2019-05-10 03:34:06 +00:00
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#if CONFIG_SYSVIEW_ENABLE
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SEGGER_SYSVIEW_Conf();
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#endif
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2020-03-03 04:22:41 +00:00
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#if CONFIG_ESP_DEBUG_STUBS_ENABLE
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2019-05-10 03:34:06 +00:00
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esp_dbg_stubs_init();
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#endif
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2020-03-03 04:22:41 +00:00
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2019-05-10 03:34:06 +00:00
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err = esp_pthread_init();
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assert(err == ESP_OK && "Failed to init pthread module!");
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2020-03-10 15:46:10 +00:00
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#if CONFIG_ESP32S2_MEMPROT_FEATURE
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#if CONFIG_ESP32S2_MEMPROT_FEATURE_LOCK
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esp_memprot_set_prot(true, true);
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#else
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esp_memprot_set_prot(true, false);
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#endif
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#endif
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2019-05-10 03:34:06 +00:00
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do_global_ctors();
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2019-06-04 07:02:01 +00:00
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#if CONFIG_ESP_INT_WDT
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2019-08-04 11:16:58 +00:00
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esp_int_wdt_init();
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2020-03-03 04:22:41 +00:00
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//Initialize the interrupt watch dog for CPU0.
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2019-08-04 11:16:58 +00:00
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esp_int_wdt_cpu_init();
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2020-03-03 04:22:41 +00:00
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#else
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#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
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assert(!soc_has_cache_lock_bug() && "ESP32 Rev 3 + Dual Core + PSRAM requires INT WDT enabled in project config!");
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#endif
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2019-05-10 03:34:06 +00:00
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#endif
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2020-03-03 04:22:41 +00:00
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2019-05-10 03:34:06 +00:00
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esp_crosscore_int_init();
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2020-03-03 04:22:41 +00:00
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#ifndef CONFIG_FREERTOS_UNICORE
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esp_dport_access_int_init();
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#endif
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2020-02-05 11:57:40 +00:00
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2019-05-10 03:34:06 +00:00
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spi_flash_init();
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/* init default OS-aware flash access critical section */
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spi_flash_guard_set(&g_flash_guard_default_ops);
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2019-11-28 01:20:00 +00:00
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esp_flash_app_init();
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esp_err_t flash_ret = esp_flash_init_default_chip();
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assert(flash_ret == ESP_OK);
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2020-03-03 04:22:41 +00:00
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#if CONFIG_IDF_TARGET_ESP32
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#if CONFIG_ESP32_ENABLE_COREDUMP
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esp_core_dump_init();
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#endif
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#endif
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2019-05-10 03:34:06 +00:00
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#ifdef CONFIG_PM_ENABLE
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esp_pm_impl_init();
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#ifdef CONFIG_PM_DFS_INIT_AUTO
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2020-02-12 11:41:52 +00:00
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int xtal_freq = (int) rtc_clk_xtal_freq_get();
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2020-03-03 04:22:41 +00:00
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esp_pm_config_esp32_t cfg = {
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.max_freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ,
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2020-02-12 11:41:52 +00:00
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.min_freq_mhz = xtal_freq,
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2019-05-10 03:34:06 +00:00
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};
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esp_pm_configure(&cfg);
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#endif //CONFIG_PM_DFS_INIT_AUTO
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#endif //CONFIG_PM_ENABLE
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2020-03-03 04:22:41 +00:00
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#if CONFIG_IDF_TARGET_ESP32
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#if CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
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esp_coex_adapter_register(&g_coex_adapter_funcs);
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coex_pre_init();
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#endif
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2019-05-10 03:34:06 +00:00
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#endif
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2020-02-05 11:57:40 +00:00
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do_system_init_fn();
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2019-05-10 03:34:06 +00:00
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portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
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2020-03-03 04:22:41 +00:00
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ESP_TASK_MAIN_STACK, NULL,
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ESP_TASK_MAIN_PRIO, NULL, 0);
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2019-05-10 03:34:06 +00:00
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assert(res == pdTRUE);
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2020-03-10 15:46:10 +00:00
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2019-05-10 03:34:06 +00:00
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ESP_LOGI(TAG, "Starting scheduler on PRO CPU.");
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vTaskStartScheduler();
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|
abort(); /* Only get to here if not enough free heap to start scheduler */
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2020-03-03 04:22:41 +00:00
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}
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