OVMS3-idf/components/soc/src/hal/uart_hal_iram.c
Alex Lisitsyn 3abdd2207d freemodbus: fix long buffer failure
check master read write functions with array of registers)
fix master serial processing code and modbus controller to work with register array
modbus_master: add reading and writing of test value array (58 registers) to check failure is gone
remove parameter temporary buffer from modbus controller to allow more than 24 byte writes
driver: fix issue with TOUT feature
driver: fix uart_rx_timeout issue
driver: fix issue with rxfifo_tout_int_raw not triggered when received fifo_len = 120 byte and all bytes read out of fifo as result of rxfifo_full_int_raw
driver: add function uart_internal_set_always_rx_timeout() to always handle tout interrupt
examples: call uart_internal_set_always_rx_timeout() to handle tout interrupt correctly
examples: update examples to use tout feature
driver: reflect changes of uart_set_always_rx_timeout() function, change uart.c
driver: change conditions to trigger workaround for tout feature in uart.c
driver: change uart_set_always_rx_timeout()
freemodbus: fix tabs, remove commented code
driver: remove uart_ll_is_rx_idle()
2020-03-30 22:05:48 +08:00

48 lines
1.5 KiB
C

// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
// The HAL layer for UART (IRAM part)
#include "hal/uart_hal.h"
void uart_hal_txfifo_rst(uart_hal_context_t *hal)
{
uart_ll_txfifo_rst(hal->dev);
}
void uart_hal_rxfifo_rst(uart_hal_context_t *hal)
{
uart_ll_rxfifo_rst(hal->dev);
}
void uart_hal_tx_break(uart_hal_context_t *hal, uint32_t break_num)
{
uart_ll_tx_break(hal->dev, break_num);
}
void uart_hal_write_txfifo(uart_hal_context_t *hal, const uint8_t *buf, uint32_t data_size, uint32_t *write_size)
{
uint16_t fill_len = uart_ll_get_txfifo_len(hal->dev);
if(fill_len > data_size) {
fill_len = data_size;
}
*write_size = fill_len;
uart_ll_write_txfifo(hal->dev, buf, fill_len);
}
void uart_hal_read_rxfifo(uart_hal_context_t *hal, uint8_t *buf, int *inout_rd_len)
{
uint16_t read_len = (*inout_rd_len > 0) ? *inout_rd_len : uart_ll_get_rxfifo_len(hal->dev);
*inout_rd_len = read_len;
uart_ll_read_rxfifo(hal->dev, buf, read_len);
}