80 lines
1.9 KiB
ArmAsm
80 lines
1.9 KiB
ArmAsm
#include <xtensa/coreasm.h>
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#include <xtensa/corebits.h>
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#include <xtensa/config/system.h>
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#include "freertos/xtensa_context.h"
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#include "sdkconfig.h"
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#include "soc/soc.h"
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#include "soc/dport_reg.h"
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#ifndef CONFIG_FREERTOS_UNICORE
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#define L5_INTR_STACK_SIZE 12
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#define L5_INTR_A2_OFFSET 0
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#define L5_INTR_A3_OFFSET 4
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#define L5_INTR_A4_OFFSET 8
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.data
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_l5_intr_stack:
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.space L5_INTR_STACK_SIZE
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.section .iram1,"ax"
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.global xt_highint5
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.type xt_highint5,@function
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.align 4
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xt_highint5:
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movi a0, xt_highint5_read_apb
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l32i a0, a0, 0
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bnez a0, .read_apb_reg
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// Short interrupt
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esync
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rsr a0, CCOUNT
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addi a0, a0, 27
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wsr a0, CCOMPARE2
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esync
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rsr a0, EXCSAVE_5 // restore a0
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rfi 5
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// read APB reg 10 time.
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.read_apb_reg:
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movi a0, _l5_intr_stack
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s32i a2, a0, L5_INTR_A2_OFFSET
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s32i a3, a0, L5_INTR_A3_OFFSET
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s32i a4, a0, L5_INTR_A4_OFFSET
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movi a4, 10 // count of reading
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movi a0, 0x3ff40078 // read APB reg
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l32i a2, a0, 0
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.loop_read_apb_reg:
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l32i a3, a0, 0
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bne a3, a2, .need_set_apb_test_result
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addi a4, a4, -1
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l32i a2, a0, 0
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bnez a4, .loop_read_apb_reg
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j 1f
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.need_set_apb_test_result:
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movi a0, apb_intr_test_result // set fail
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movi a2, 0
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s32i a2, a0, 0
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memw
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1:
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movi a0, _l5_intr_stack
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l32i a2, a0, L5_INTR_A2_OFFSET
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l32i a3, a0, L5_INTR_A3_OFFSET
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l32i a4, a0, L5_INTR_A4_OFFSET
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rsync
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.L_xt_highint5_exit:
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rsr a0, EXCSAVE_5 // restore a0
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rfi 5
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/* The linker has no reason to link in this file; all symbols it exports are already defined
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(weakly!) in the default int handler. Define a symbol here so we can use it to have the
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linker inspect this anyway. */
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.global ld_include_test_dport_xt_highint5
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ld_include_test_dport_xt_highint5:
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#endif // CONFIG_FREERTOS_UNICORE
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