ad100e497a
The other (static) definition is in flash_ops.c, all references are also in flash_ops.c.
649 lines
20 KiB
C
649 lines
20 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdlib.h>
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#include <stdio.h>
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#include <sys/param.h>
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#include <string.h>
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#include "spi_flash_chip_driver.h"
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#include "memspi_host_driver.h"
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#include "esp_log.h"
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#include "sdkconfig.h"
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#include "esp_heap_caps.h"
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static const char TAG[] = "spi_flash";
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#define MAX_WRITE_CHUNK 8192 /* write in chunks */
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#define MAX_READ_CHUNK 16384
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#ifdef CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
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#define UNSAFE_WRITE_ADDRESS abort()
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#else
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#define UNSAFE_WRITE_ADDRESS return ESP_ERR_INVALID_ARG
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#endif
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/* CHECK_WRITE_ADDRESS macro to fail writes which land in the
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bootloader, partition table, or running application region.
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*/
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#if CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED
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#define CHECK_WRITE_ADDRESS(CHIP, ADDR, SIZE)
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#else /* FAILS or ABORTS */
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#define CHECK_WRITE_ADDRESS(CHIP, ADDR, SIZE) do { \
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if (CHIP && CHIP->host->region_protected && CHIP->host->region_protected(CHIP->host, ADDR, SIZE)) { \
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UNSAFE_WRITE_ADDRESS; \
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} \
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} while(0)
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#endif // CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED
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#define IO_STR_LEN 7
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static const char io_mode_str[][IO_STR_LEN] = {
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"slowrd",
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"fastrd",
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"dout",
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"dio",
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"qout",
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"qio",
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};
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_Static_assert(sizeof(io_mode_str)/IO_STR_LEN == SPI_FLASH_READ_MODE_MAX, "the io_mode_str should be consistent with the esp_flash_read_mode_t defined in spi_flash_ll.h");
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/* Static function to notify OS of a new SPI flash operation.
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If returns an error result, caller must abort. If returns ESP_OK, caller must
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call spiflash_end() before returning.
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*/
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static esp_err_t IRAM_ATTR spiflash_start(esp_flash_t *chip)
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{
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if (chip->os_func != NULL && chip->os_func->start != NULL) {
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esp_err_t err = chip->os_func->start(chip->os_func_data);
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if (err != ESP_OK) {
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return err;
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}
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}
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chip->host->dev_config(chip->host);
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return ESP_OK;
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}
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/* Static function to notify OS that SPI flash operation is complete.
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*/
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static esp_err_t IRAM_ATTR spiflash_end(const esp_flash_t *chip, esp_err_t err)
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{
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if (chip->os_func != NULL
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&& chip->os_func->end != NULL) {
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esp_err_t end_err = chip->os_func->end(chip->os_func_data);
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if (err == ESP_OK) {
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err = end_err; // Only return the 'end' error if we haven't already failed
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}
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}
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return err;
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}
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/* Return true if regions 'a' and 'b' overlap at all, based on their start offsets and lengths. */
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inline static bool regions_overlap(uint32_t a_start, uint32_t a_len,uint32_t b_start, uint32_t b_len);
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/* Top-level API functions, calling into chip_drv functions via chip->drv */
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static esp_err_t detect_spi_flash_chip(esp_flash_t *chip);
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bool esp_flash_chip_driver_initialized(const esp_flash_t *chip)
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{
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if (!chip->chip_drv) return false;
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return true;
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}
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esp_err_t IRAM_ATTR esp_flash_init(esp_flash_t *chip)
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{
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esp_err_t err = ESP_OK;
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if (chip == NULL || chip->host == NULL || chip->host->driver_data == NULL ||
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((memspi_host_data_t*)chip->host->driver_data)->spi == NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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if (!esp_flash_chip_driver_initialized(chip)) {
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// Detect chip_drv
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err = detect_spi_flash_chip(chip);
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if (err != ESP_OK) {
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return err;
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}
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}
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// Detect flash size
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uint32_t size;
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err = esp_flash_get_size(chip, &size);
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if (err != ESP_OK) {
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ESP_LOGE(TAG, "failed to get chip size");
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return err;
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}
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ESP_LOGI(TAG, "flash io: %s", io_mode_str[chip->read_mode]);
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err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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if (err == ESP_OK) {
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// Try to set the flash mode to whatever default mode was chosen
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err = chip->chip_drv->set_read_mode(chip);
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}
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// Done: all fields on 'chip' are initialised
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return spiflash_end(chip, err);
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}
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static esp_err_t IRAM_ATTR detect_spi_flash_chip(esp_flash_t *chip)
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{
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esp_err_t err;
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uint32_t flash_id;
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int retries = 10;
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do {
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err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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// Send generic RDID command twice, check for a matching result and retry in case we just powered on (inner
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// function fails if it sees all-ones or all-zeroes.)
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err = chip->host->read_id(chip->host, &flash_id);
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if (err == ESP_OK) { // check we see the same ID twice, in case of transient power-on errors
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uint32_t new_id;
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err = chip->host->read_id(chip->host, &new_id);
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if (err == ESP_OK && (new_id != flash_id)) {
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err = ESP_ERR_FLASH_NOT_INITIALISED;
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}
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}
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err = spiflash_end(chip, err);
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} while (err != ESP_OK && retries-- > 0);
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// Detect the chip and set the chip_drv structure for it
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const spi_flash_chip_t **drivers = esp_flash_registered_chips;
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while (*drivers != NULL && !esp_flash_chip_driver_initialized(chip)) {
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chip->chip_drv = *drivers;
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// start/end SPI operation each time, for multitasking
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// and also so esp_flash_registered_flash_drivers can live in flash
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ESP_LOGD(TAG, "trying chip: %s", chip->chip_drv->name);
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err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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if (chip->chip_drv->probe(chip, flash_id) != ESP_OK) {
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chip->chip_drv = NULL;
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}
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// if probe succeeded, chip->drv stays set
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drivers++;
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err = spiflash_end(chip, err);
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if (err != ESP_OK) {
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return err;
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}
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}
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if (!esp_flash_chip_driver_initialized(chip)) {
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return ESP_ERR_NOT_FOUND;
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}
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ESP_LOGI(TAG, "detected chip: %s", chip->chip_drv->name);
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return ESP_OK;
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}
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// Convenience macro for beginning of all API functions,
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// check that the 'chip' parameter is properly initialised
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// and supports the operation in question
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#define VERIFY_OP(OP) do { \
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if (chip == NULL) { \
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chip = esp_flash_default_chip; \
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} \
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if (chip == NULL || !esp_flash_chip_driver_initialized(chip)) { \
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return ESP_ERR_FLASH_NOT_INITIALISED; \
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} \
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if (chip->chip_drv->OP == NULL) { \
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return ESP_ERR_FLASH_UNSUPPORTED_CHIP; \
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} \
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} while (0)
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esp_err_t IRAM_ATTR esp_flash_read_id(esp_flash_t *chip, uint32_t *out_id)
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{
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if (chip == NULL) {
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chip = esp_flash_default_chip;
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}
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if (chip == NULL || !esp_flash_chip_driver_initialized(chip)) {
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return ESP_ERR_FLASH_NOT_INITIALISED;
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}
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if (out_id == NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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esp_err_t err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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err = chip->host->read_id(chip->host, out_id);
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return spiflash_end(chip, err);
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}
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esp_err_t IRAM_ATTR esp_flash_get_size(esp_flash_t *chip, uint32_t *out_size)
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{
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VERIFY_OP(detect_size);
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if (out_size == NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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if (chip->size != 0) {
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*out_size = chip->size;
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return ESP_OK;
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}
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esp_err_t err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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uint32_t detect_size;
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err = chip->chip_drv->detect_size(chip, &detect_size);
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if (err == ESP_OK) {
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chip->size = detect_size;
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}
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return spiflash_end(chip, err);
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}
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esp_err_t IRAM_ATTR esp_flash_erase_chip(esp_flash_t *chip)
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{
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VERIFY_OP(erase_chip);
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CHECK_WRITE_ADDRESS(chip, 0, chip->size);
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esp_err_t err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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err = chip->chip_drv->erase_chip(chip);
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return spiflash_end(chip, err);
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}
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esp_err_t IRAM_ATTR esp_flash_erase_region(esp_flash_t *chip, uint32_t start, uint32_t len)
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{
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VERIFY_OP(erase_sector);
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VERIFY_OP(erase_block);
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CHECK_WRITE_ADDRESS(chip, start, len);
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uint32_t block_erase_size = chip->chip_drv->erase_block == NULL ? 0 : chip->chip_drv->block_erase_size;
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uint32_t sector_size = chip->chip_drv->sector_size;
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if (sector_size == 0 || (block_erase_size % sector_size) != 0) {
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return ESP_ERR_FLASH_NOT_INITIALISED;
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}
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if (start > chip->size || start + len > chip->size) {
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return ESP_ERR_INVALID_ARG;
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}
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if ((start % chip->chip_drv->sector_size) != 0 || (len % chip->chip_drv->sector_size) != 0) {
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// Can only erase multiples of the sector size, starting at sector boundary
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return ESP_ERR_INVALID_ARG;
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}
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esp_err_t err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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// Check for write protected regions overlapping the erase region
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if (chip->chip_drv->get_protected_regions != NULL &&
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chip->chip_drv->num_protectable_regions > 0) {
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uint64_t protected = 0;
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err = chip->chip_drv->get_protected_regions(chip, &protected);
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if (err == ESP_OK && protected != 0) {
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for (int i = 0; i < chip->chip_drv->num_protectable_regions && err == ESP_OK; i++) {
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const esp_flash_region_t *region = &chip->chip_drv->protectable_regions[i];
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if ((protected & BIT64(i))
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&& regions_overlap(start, len, region->offset, region->size)) {
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err = ESP_ERR_FLASH_PROTECTED;
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}
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}
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}
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}
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// Don't lock the SPI flash for the entire erase, as this may be very long
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err = spiflash_end(chip, err);
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while (err == ESP_OK && len >= sector_size) {
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err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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// If possible erase an entire multi-sector block
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if (block_erase_size > 0 && len >= block_erase_size && (start % block_erase_size) == 0) {
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err = chip->chip_drv->erase_block(chip, start);
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start += block_erase_size;
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len -= block_erase_size;
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}
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else {
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// Otherwise erase individual sector only
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err = chip->chip_drv->erase_sector(chip, start);
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start += sector_size;
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len -= sector_size;
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}
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err = spiflash_end(chip, err);
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}
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return err;
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}
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esp_err_t IRAM_ATTR esp_flash_get_chip_write_protect(esp_flash_t *chip, bool *out_write_protected)
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{
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VERIFY_OP(get_chip_write_protect);
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if (out_write_protected == NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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esp_err_t err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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err = chip->chip_drv->get_chip_write_protect(chip, out_write_protected);
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return spiflash_end(chip, err);
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}
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esp_err_t IRAM_ATTR esp_flash_set_chip_write_protect(esp_flash_t *chip, bool write_protect)
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{
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VERIFY_OP(set_chip_write_protect);
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//TODO: skip writing if already locked or unlocked
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esp_err_t err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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err = chip->chip_drv->set_chip_write_protect(chip, write_protect);
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return spiflash_end(chip, err);
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}
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esp_err_t esp_flash_get_protectable_regions(const esp_flash_t *chip, const esp_flash_region_t **out_regions, uint32_t *out_num_regions)
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{
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if(out_num_regions != NULL) {
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*out_num_regions = 0; // In case caller doesn't check result
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}
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VERIFY_OP(get_protected_regions);
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if(out_regions == NULL || out_num_regions == NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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*out_num_regions = chip->chip_drv->num_protectable_regions;
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*out_regions = chip->chip_drv->protectable_regions;
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return ESP_OK;
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}
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static esp_err_t find_region(const esp_flash_t *chip, const esp_flash_region_t *region, uint8_t *index)
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{
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if (region == NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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for(*index = 0; *index < chip->chip_drv->num_protectable_regions; (*index)++) {
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if (memcmp(&chip->chip_drv->protectable_regions[*index],
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region, sizeof(esp_flash_region_t)) == 0) {
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return ESP_OK;
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}
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}
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return ESP_ERR_NOT_FOUND;
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}
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esp_err_t IRAM_ATTR esp_flash_get_protected_region(esp_flash_t *chip, const esp_flash_region_t *region, bool *out_protected)
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{
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VERIFY_OP(get_protected_regions);
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if (out_protected == NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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uint8_t index;
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esp_err_t err = find_region(chip, region, &index);
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if (err != ESP_OK) {
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return err;
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}
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uint64_t protection_mask = 0;
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err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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err = chip->chip_drv->get_protected_regions(chip, &protection_mask);
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if (err == ESP_OK) {
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*out_protected = protection_mask & (1LL << index);
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}
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return spiflash_end(chip, err);
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}
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esp_err_t IRAM_ATTR esp_flash_set_protected_region(esp_flash_t *chip, const esp_flash_region_t *region, bool protect)
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{
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VERIFY_OP(set_protected_regions);
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uint8_t index;
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esp_err_t err = find_region(chip, region, &index);
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if (err != ESP_OK) {
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return err;
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}
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uint64_t protection_mask = 0;
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err = spiflash_start(chip);
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if (err != ESP_OK) {
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return err;
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}
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err = chip->chip_drv->get_protected_regions(chip, &protection_mask);
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if (err == ESP_OK) {
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if (protect) {
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protection_mask |= (1LL << index);
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} else {
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protection_mask &= ~(1LL << index);
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}
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err = chip->chip_drv->set_protected_regions(chip, protection_mask);
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}
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return spiflash_end(chip, err);
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}
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esp_err_t IRAM_ATTR esp_flash_read(esp_flash_t *chip, void *buffer, uint32_t address, uint32_t length)
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{
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if (length == 0) {
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return ESP_OK;
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}
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VERIFY_OP(read);
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if (buffer == NULL || address > chip->size || address+length > chip->size) {
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return ESP_ERR_INVALID_ARG;
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}
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//when the cache is disabled, only the DRAM can be read, check whether we need to receive in another buffer in DRAM.
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bool direct_read = chip->host->supports_direct_read(chip->host, buffer);
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uint8_t* temp_buffer = NULL;
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if (!direct_read) {
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uint32_t length_to_allocate = MAX(MAX_READ_CHUNK, length);
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length_to_allocate = (length_to_allocate+3)&(~3);
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temp_buffer = heap_caps_malloc(length_to_allocate, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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ESP_LOGV(TAG, "allocate temp buffer: %p", temp_buffer);
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if (temp_buffer == NULL) return ESP_ERR_NO_MEM;
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}
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esp_err_t err = ESP_OK;
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do {
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err = spiflash_start(chip);
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if (err != ESP_OK) {
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break;
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}
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//if required (dma buffer allocated), read to the buffer instead of the original buffer
|
|
uint8_t* buffer_to_read = (temp_buffer)? temp_buffer : buffer;
|
|
//each time, we at most read this length
|
|
//after that, we release the lock to allow some other operations
|
|
uint32_t length_to_read = MIN(MAX_READ_CHUNK, length);
|
|
|
|
if (err == ESP_OK) {
|
|
err = chip->chip_drv->read(chip, buffer_to_read, address, length_to_read);
|
|
}
|
|
if (err != ESP_OK) {
|
|
spiflash_end(chip, err);
|
|
break;
|
|
}
|
|
//even if this is failed, the data is still valid, copy before quit
|
|
err = spiflash_end(chip, err);
|
|
|
|
//copy back to the original buffer
|
|
if (temp_buffer) {
|
|
memcpy(buffer, temp_buffer, length_to_read);
|
|
}
|
|
address += length_to_read;
|
|
length -= length_to_read;
|
|
buffer += length_to_read;
|
|
} while (err == ESP_OK && length > 0);
|
|
|
|
free(temp_buffer);
|
|
return err;
|
|
}
|
|
|
|
esp_err_t IRAM_ATTR esp_flash_write(esp_flash_t *chip, const void *buffer, uint32_t address, uint32_t length)
|
|
{
|
|
if (length == 0) {
|
|
return ESP_OK;
|
|
}
|
|
VERIFY_OP(write);
|
|
CHECK_WRITE_ADDRESS(chip, address, length);
|
|
if (buffer == NULL || address > chip->size || address+length > chip->size) {
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
|
|
//when the cache is disabled, only the DRAM can be read, check whether we need to copy the data first
|
|
bool direct_write = chip->host->supports_direct_write(chip->host, buffer);
|
|
|
|
esp_err_t err = ESP_OK;
|
|
/* Write output in chunks, either by buffering on stack or
|
|
by artificially cutting into MAX_WRITE_CHUNK parts (in an OS
|
|
environment, this prevents writing from causing interrupt or higher priority task
|
|
starvation.) */
|
|
do {
|
|
uint32_t write_len;
|
|
const void *write_buf;
|
|
if (direct_write) {
|
|
write_len = MIN(length, MAX_WRITE_CHUNK);
|
|
write_buf = buffer;
|
|
} else {
|
|
uint32_t buf[8];
|
|
write_len = MIN(length, sizeof(buf));
|
|
memcpy(buf, buffer, write_len);
|
|
write_buf = buf;
|
|
}
|
|
|
|
err = spiflash_start(chip);
|
|
if (err != ESP_OK) {
|
|
return err;
|
|
}
|
|
|
|
err = chip->chip_drv->write(chip, write_buf, address, write_len);
|
|
|
|
address += write_len;
|
|
buffer = (void *)((intptr_t)buffer + write_len);
|
|
length -= write_len;
|
|
|
|
err = spiflash_end(chip, err);
|
|
} while (err == ESP_OK && length > 0);
|
|
return err;
|
|
}
|
|
|
|
esp_err_t IRAM_ATTR esp_flash_write_encrypted(esp_flash_t *chip, uint32_t address, const void *buffer, uint32_t length)
|
|
{
|
|
VERIFY_OP(write_encrypted);
|
|
if (((memspi_host_data_t*)chip->host->driver_data)->spi != 0) {
|
|
// Encrypted operations have to use SPI0
|
|
return ESP_ERR_FLASH_UNSUPPORTED_HOST;
|
|
}
|
|
if (buffer == NULL || address > chip->size || address+length > chip->size) {
|
|
return ESP_ERR_INVALID_ARG;
|
|
}
|
|
|
|
esp_err_t err = spiflash_start(chip);
|
|
if (err != ESP_OK) {
|
|
return err;
|
|
}
|
|
|
|
err = chip->chip_drv->write_encrypted(chip, buffer, address, length);
|
|
|
|
return spiflash_end(chip, err);
|
|
}
|
|
|
|
|
|
inline static IRAM_ATTR bool regions_overlap(uint32_t a_start, uint32_t a_len,uint32_t b_start, uint32_t b_len)
|
|
{
|
|
uint32_t a_end = a_start + a_len;
|
|
uint32_t b_end = b_start + b_len;
|
|
return (a_end > b_start && b_end > a_start);
|
|
}
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
Adapter layer to original api before IDF v4.0
|
|
------------------------------------------------------------------------------*/
|
|
|
|
#ifndef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
|
|
|
|
static esp_err_t spi_flash_translate_rc(esp_err_t err)
|
|
{
|
|
switch (err) {
|
|
case ESP_OK:
|
|
return ESP_OK;
|
|
case ESP_ERR_INVALID_ARG:
|
|
return ESP_ERR_INVALID_ARG;
|
|
case ESP_ERR_FLASH_NOT_INITIALISED:
|
|
case ESP_ERR_FLASH_PROTECTED:
|
|
return ESP_ERR_INVALID_STATE;
|
|
case ESP_ERR_NOT_FOUND:
|
|
case ESP_ERR_FLASH_UNSUPPORTED_HOST:
|
|
case ESP_ERR_FLASH_UNSUPPORTED_CHIP:
|
|
return ESP_ERR_NOT_SUPPORTED;
|
|
case ESP_ERR_FLASH_NO_RESPONSE:
|
|
return ESP_ERR_INVALID_RESPONSE;
|
|
default:
|
|
ESP_EARLY_LOGE(TAG, "unexpected spi flash error code: %x", err);
|
|
abort();
|
|
}
|
|
return ESP_OK;
|
|
}
|
|
|
|
esp_err_t spi_flash_erase_range(uint32_t start_addr, uint32_t size)
|
|
{
|
|
esp_err_t err = esp_flash_erase_region(NULL, start_addr, size);
|
|
return spi_flash_translate_rc(err);
|
|
}
|
|
|
|
esp_err_t spi_flash_write(size_t dst, const void *srcv, size_t size)
|
|
{
|
|
esp_err_t err = esp_flash_write(NULL, srcv, dst, size);
|
|
return spi_flash_translate_rc(err);
|
|
}
|
|
|
|
esp_err_t spi_flash_read(size_t src, void *dstv, size_t size)
|
|
{
|
|
esp_err_t err = esp_flash_read(NULL, dstv, src, size);
|
|
return spi_flash_translate_rc(err);
|
|
}
|
|
|
|
#endif // CONFIG_SPI_FLASH_USE_LEGACY_IMPL
|