OVMS3-idf/components/bootloader/src
Ivan Grokhotkov 75658ee29b bootloader: workaround for clock switching bug in ESP32 rev. 0
In ESP32 rev. 0, switching between 240MHz and 80MHz (even via an
intermediate frequency of 40MHz) may cause the chip to lock up.
The bootloader used to enable 80MHz CPU clock at startup, which could
cause lock up after software reset. With this change, if 240MHz CPU
clock is enabled in menuconfig, bootloader will also use 240MHz to avoid
lock-up.
2017-06-15 18:15:35 +08:00
..
main bootloader: workaround for clock switching bug in ESP32 rev. 0 2017-06-15 18:15:35 +08:00
.gitignore Initial public version 2016-08-17 23:08:22 +08:00
Makefile soc: add source code of rtc_clk, rtc_pm 2017-04-11 15:45:54 +08:00