Bootloader enables SAR ADC in test mode to get some entropy for the RNG. The bits which control the ADC test mux were not disabled, which caused extra ~24uA current to be drawn from VRTC, increasing deep sleep current consumption. This change disables relevant test mode bits in bootloader_random_disable. |
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.. | ||
bootloader_flash.c | ||
bootloader_random.c | ||
efuse.c | ||
esp_image_format.c | ||
flash_encrypt.c | ||
flash_partitions.c | ||
secure_boot.c | ||
secure_boot_signatures.c |