OVMS3-idf/components/xtensa
Sachin Parekh 1e6c25992e esp32: IRAM_DATA_ATTR and IRAM_BSS_ATTR introduced
Using these attributes, .data and .bss can be placed in IRAM

Signed-off-by: Sachin Parekh <sachin.parekh@espressif.com>
2020-04-17 19:35:23 +05:30
..
esp32 soc: create abstraction for cpu related operations 2020-02-27 07:14:19 +05:00
esp32s2 soc: create abstraction for cpu related operations 2020-02-27 07:14:19 +05:00
include esp32: IRAM_DATA_ATTR and IRAM_BSS_ATTR introduced 2020-04-17 19:35:23 +05:30
trax xtensa: add a script for parsing CPU traces (TRAX) 2020-03-13 17:30:29 +01:00
CMakeLists.txt xtensa: add TRAX support for esp32s2 2020-02-19 14:02:14 +01:00
component.mk xtensa: add TRAX support for esp32s2 2020-02-19 14:02:14 +01:00
debug_helpers.c global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
debug_helpers_asm.S esp32: Refactor backtrace and add esp_backtrace_print() 2019-06-19 18:30:18 +08:00
eri.c create xtensa component 2019-03-27 20:24:28 +08:00
expression_with_stack_xtensa.c shared_stack: using watchpoint 1 to monitor the shared_stack instead of watchpoint 0 2020-02-10 12:03:30 -03:00
expression_with_stack_xtensa_asm.S shared_stack: fixed watchpoint placement on shared_stack 2020-02-10 12:03:30 -03:00
linker.lf atomic: support fetch_and, fetch_and and fetch_xor 2020-03-04 11:35:23 +08:00
stdatomic.c atomic: support fetch_and, fetch_and and fetch_xor 2020-03-04 11:35:23 +08:00
trax.c xtensa: add TRAX support for esp32s2 2020-02-19 14:02:14 +01:00