182 lines
6.2 KiB
C
182 lines
6.2 KiB
C
// Copyright 2016-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <esp_types.h>
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#include <stdlib.h>
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#include <ctype.h>
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#include "esp_log.h"
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#include "sys/lock.h"
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#include "soc/rtc.h"
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#include "soc/periph_defs.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/xtensa_api.h"
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#include "freertos/semphr.h"
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#include "freertos/timers.h"
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#include "esp_intr_alloc.h"
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#include "driver/rtc_io.h"
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#include "driver/rtc_cntl.h"
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#include "driver/gpio.h"
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#include "driver/adc.h"
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#include "sdkconfig.h"
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#include "esp32/rom/ets_sys.h"
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#ifndef NDEBUG
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// Enable built-in checks in queue.h in debug builds
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#define INVARIANTS
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#endif
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#include "sys/queue.h"
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#include "hal/adc_types.h"
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#include "hal/adc_hal.h"
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#define ADC_MAX_MEAS_NUM_DEFAULT (255)
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#define ADC_MEAS_NUM_LIM_DEFAULT (1)
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#define SAR_ADC_CLK_DIV_DEFUALT (2)
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#define DIG_ADC_OUTPUT_FORMAT_DEFUALT (ADC_DIGI_FORMAT_12BIT)
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#define DIG_ADC_ATTEN_DEFUALT (ADC_ATTEN_DB_11)
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#define DIG_ADC_BIT_WIDTH_DEFUALT (ADC_WIDTH_BIT_12)
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#define ADC_CHECK_RET(fun_ret) ({ \
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if (fun_ret != ESP_OK) { \
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ESP_LOGE(ADC_TAG,"%s:%d\n",__FUNCTION__,__LINE__); \
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return ESP_FAIL; \
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} \
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})
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static const char *ADC_TAG = "ADC";
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#define ADC_CHECK(a, str, ret_val) ({ \
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if (!(a)) { \
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ESP_LOGE(ADC_TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
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return (ret_val); \
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} \
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})
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#define ADC_GET_IO_NUM(periph, channel) (adc_channel_io_map[periph][channel])
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#define ADC_CHANNEL_CHECK(periph, channel) ADC_CHECK(channel < SOC_ADC_CHANNEL_NUM(periph), "ADC"#periph" channel error", ESP_ERR_INVALID_ARG)
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extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
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#define ADC_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock)
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#define ADC_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock)
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/*---------------------------------------------------------------
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Digital controller setting
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---------------------------------------------------------------*/
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esp_err_t adc_set_i2s_data_source(adc_i2s_source_t src)
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{
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ADC_CHECK(src < ADC_I2S_DATA_SRC_MAX, "ADC i2s data source error", ESP_ERR_INVALID_ARG);
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ADC_ENTER_CRITICAL();
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adc_hal_digi_set_data_source(src);
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ADC_EXIT_CRITICAL();
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return ESP_OK;
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}
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esp_err_t adc_i2s_mode_init(adc_unit_t adc_unit, adc_channel_t channel)
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{
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if (adc_unit & ADC_UNIT_1) {
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ADC_CHECK((SOC_ADC_SUPPORT_DMA_MODE(ADC_NUM_1)), "ADC1 not support DMA for now.", ESP_ERR_INVALID_ARG);
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ADC_CHANNEL_CHECK(ADC_NUM_1, channel);
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}
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if (adc_unit & ADC_UNIT_2) {
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ADC_CHECK((SOC_ADC_SUPPORT_DMA_MODE(ADC_NUM_2)), "ADC2 not support DMA for now.", ESP_ERR_INVALID_ARG);
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ADC_CHANNEL_CHECK(ADC_NUM_2, channel);
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}
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adc_hal_digi_pattern_table_t adc1_pattern[1];
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adc_hal_digi_pattern_table_t adc2_pattern[1];
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adc_hal_digi_config_t dig_cfg = {
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.conv_limit_en = ADC_MEAS_NUM_LIM_DEFAULT,
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.conv_limit_num = ADC_MAX_MEAS_NUM_DEFAULT,
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.clk_div = SAR_ADC_CLK_DIV_DEFUALT,
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.format = DIG_ADC_OUTPUT_FORMAT_DEFUALT,
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.conv_mode = (adc_hal_digi_convert_mode_t)adc_unit,
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};
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if (adc_unit & ADC_UNIT_1) {
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adc1_pattern[0].atten = DIG_ADC_ATTEN_DEFUALT;
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adc1_pattern[0].bit_width = DIG_ADC_BIT_WIDTH_DEFUALT;
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adc1_pattern[0].channel = channel;
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dig_cfg.adc1_pattern_len = 1;
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dig_cfg.adc1_pattern = adc1_pattern;
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}
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if (adc_unit & ADC_UNIT_2) {
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adc2_pattern[0].atten = DIG_ADC_ATTEN_DEFUALT;
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adc2_pattern[0].bit_width = DIG_ADC_BIT_WIDTH_DEFUALT;
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adc2_pattern[0].channel = channel;
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dig_cfg.adc2_pattern_len = 1;
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dig_cfg.adc2_pattern = adc2_pattern;
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}
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ADC_ENTER_CRITICAL();
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adc_hal_digi_init();
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adc_hal_digi_controller_config(&dig_cfg);
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ADC_EXIT_CRITICAL();
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return ESP_OK;
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}
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/*---------------------------------------------------------------
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RTC controller setting
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---------------------------------------------------------------*/
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esp_err_t adc2_vref_to_gpio(gpio_num_t gpio)
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{
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ADC_ENTER_CRITICAL();
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adc_hal_set_power_manage(ADC_POWER_SW_ON);
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ADC_EXIT_CRITICAL();
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if (adc_hal_vref_output(gpio) != true) {
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return ESP_ERR_INVALID_ARG;
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}
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//Configure RTC gpio
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rtc_gpio_init(gpio);
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rtc_gpio_set_direction(gpio, RTC_GPIO_MODE_DISABLED);
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rtc_gpio_pullup_dis(gpio);
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rtc_gpio_pulldown_dis(gpio);
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return ESP_OK;
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}
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/*---------------------------------------------------------------
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HALL SENSOR
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---------------------------------------------------------------*/
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static int hall_sensor_get_value(void) //hall sensor without LNA
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{
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int hall_value;
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adc_power_on();
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ADC_ENTER_CRITICAL();
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/* disable other peripherals. */
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adc_hal_amp_disable();
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adc_hal_hall_enable();
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// set controller
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adc_hal_set_controller( ADC_NUM_1, ADC_CTRL_RTC );
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hall_value = adc_hal_hall_convert();
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adc_hal_hall_disable();
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ADC_EXIT_CRITICAL();
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return hall_value;
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}
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int hall_sensor_read(void)
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{
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adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_0);
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adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_3);
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adc1_config_channel_atten(ADC1_CHANNEL_0, ADC_ATTEN_DB_0);
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adc1_config_channel_atten(ADC1_CHANNEL_3, ADC_ATTEN_DB_0);
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return hall_sensor_get_value();
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} |