Ivan Grokhotkov 85ab4fc83e sdmmc host: add handling of CD and WP pins ... Previous version of the code only connected CD and WP to the peripheral, in fact the hardware does not use the values of these signals automatically. This adds code to read CD and WP values when command is executed and return errors if card is not present, or write command is executed when WP signal is active.		2018-04-24 19:08:44 +08:00
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esp32	sdmmc host: add handling of CD and WP pins	2018-04-24 19:08:44 +08:00
include/soc	Especially when internal memory fills up, some FreeRTOS structures (queues etc) get allocated in psram. These structures also contain a spinlock, which needs an atomic-compare-swap operation to work. The psram hardware, however, does not support this operation. As a workaround, this patch detects these spinlocks and will, instead of S32C1I, use equivalent C-code to simulate the behaviour, with an (internal) mux for atomicity.	2018-02-02 17:11:06 +08:00
test	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
component.mk	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00