85e76a7cfc
Confusion here is that original ROM has two functions: * SPIReadModeCnfig() - sets mode, calls enable_qio_mode/disable_qio_mode * SPIMasterReadModeCnfig() - As above, but doesn't set QIO mode in status register However we never want to use the ROM method to set/clear QIO mode flag, as not all flash chips work this way. Instead we do it in flash_qio_mode.c in bootloader. So in both cases (ROM or "patched ROM") we now call SPIMasterReadModeCnfig(), which is now named esp_rom_spiflash_config_readmode().
24 lines
1 KiB
Plaintext
24 lines
1 KiB
Plaintext
/*
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Address table for SPI driver functions in ESP32 ROM.
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These functions are only linked from ROM when SPI_FLASH_ROM_DRIVER_PATCH is not set in configuration.
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*/
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PROVIDE ( esp_rom_spiflash_write_encrypted = 0x40062e78 );
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PROVIDE ( esp_rom_spiflash_erase_area = 0x400631ac );
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PROVIDE ( esp_rom_spiflash_erase_block = 0x40062c4c );
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PROVIDE ( esp_rom_spiflash_erase_chip = 0x40062c14 );
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PROVIDE ( esp_rom_spiflash_erase_sector = 0x40062ccc );
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PROVIDE ( esp_rom_spiflash_lock = 0x400628f0 );
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PROVIDE ( esp_rom_spiflash_read = 0x40062ed8 );
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PROVIDE ( esp_rom_spiflash_config_readmode = 0x40062b64 ); /* SPIMasterReadModeCnfig */
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PROVIDE ( esp_rom_spiflash_read_status = 0x4006226c );
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PROVIDE ( esp_rom_spiflash_read_statushigh = 0x40062448 );
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PROVIDE ( esp_rom_spiflash_write = 0x40062d50 );
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PROVIDE ( esp_rom_spiflash_enable_write = 0x40062320 );
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PROVIDE ( esp_rom_spiflash_write_status = 0x400622f0 );
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/* always using patched versions of these functions
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PROVIDE ( esp_rom_spiflash_wait_idle = 0x400622c0 );
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PROVIDE ( esp_rom_spiflash_unlock = 0x400????? );
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*/
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