6e9c59bfc3
1. Add reading psram EID. 2. Configure different clock mode for different EID. 3. add API to get psram size and voltage. 4. Remove unnecessary VSPI claim. For 32MBit@1.8V and 64MBit@3.3V psram, there should be 2 extra clock cycles after CS get high level. For 64MBit@1.8 psram, we can just use standard SPI protocol to drive the psram. We also need to increase the HOLD time for CS in this case. EID for psram: 32MBit 1.8v: 0x20 64MBit 1.8v: 0x26 64MBit 3.3v: 0x46
120 lines
3.4 KiB
C
120 lines
3.4 KiB
C
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef __ESP_SPIRAM_H
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#define __ESP_SPIRAM_H
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#include <stddef.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_err.h"
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typedef enum {
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ESP_SPIRAM_VOLT_3V3 = 0, /*!< SPI RAM voltage is 3.3v */
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ESP_SPIRAM_VOLT_1V8 = 1, /*!< SPI RAM voltage is 1.8v */
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ESP_SPIRAM_VOLT_INVALID, /*!< SPI RAM voltage is invalid*/
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} esp_spiram_volt_t;
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typedef enum {
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ESP_SPIRAM_SIZE_32MBITS = 0, /*!< SPI RAM size is 32 MBits */
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ESP_SPIRAM_SIZE_64MBITS = 1, /*!< SPI RAM size is 64 MBits */
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ESP_SPIRAM_SIZE_INVALID, /*!< SPI RAM size is invalid */
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} esp_spiram_size_t;
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/**
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* @brief get SPI RAM voltage
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* @return
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* - ESP_SPIRAM_VOLT_INVALID if SPI RAM not enabled or not valid.
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* - SPI RAM voltage
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*/
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esp_spiram_volt_t esp_spiram_get_chip_volt();
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/**
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* @brief get SPI RAM size
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* @return
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* - ESP_SPIRAM_SIZE_INVALID if SPI RAM not enabled or not valid
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* - SPI RAM size
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*/
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esp_spiram_size_t esp_spiram_get_chip_size();
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/**
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* @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
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*
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* @return ESP_OK on success
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*/
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esp_err_t esp_spiram_init();
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/**
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* @brief Configure Cache/MMU for access to external SPI RAM.
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*
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* Normally this function is called from cpu_start, if CONFIG_SPIRAM_BOOT_INIT
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* option is enabled. Applications which need to enable SPI RAM at run time
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* can disable CONFIG_SPIRAM_BOOT_INIT, and call this function later.
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*
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* @attention this function must be called with flash cache disabled.
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*/
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void esp_spiram_init_cache();
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/**
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* @brief Memory test for SPI RAM. Should be called after SPI RAM is initialized and
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* (in case of a dual-core system) the app CPU is online. This test overwrites the
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* memory with crap, so do not call after e.g. the heap allocator has stored important
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* stuff in SPI RAM.
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*
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* @return true on success, false on failed memory test
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*/
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bool esp_spiram_test();
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/**
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* @brief Add the initialized SPI RAM to the heap allocator.
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*/
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esp_err_t esp_spiram_add_to_heapalloc();
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/**
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* @brief Get the size of the attached SPI RAM chip selected in menuconfig
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*
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* @return Size in bytes, or 0 if no external RAM chip support compiled in.
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*/
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size_t esp_spiram_get_size();
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/**
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* @brief Force a writeback of the data in the SPI RAM cache. This is to be called whenever
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* cache is disabled, because disabling cache on the ESP32 discards the data in the SPI
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* RAM cache.
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*
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* This is meant for use from within the SPI flash code.
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*/
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void esp_spiram_writeback_cache();
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/**
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* @brief Reserve a pool of internal memory for specific DMA/internal allocations
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*
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* @param size Size of reserved pool in bytes
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*
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* @return
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* - ESP_OK on success
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* - ESP_ERR_NO_MEM when no memory available for pool
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*/
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esp_err_t esp_spiram_reserve_dma_pool(size_t size);
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#endif
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