add API to get chip info This change adds an API to get chip info, such as chip model, enabled capabilities, size of embedded flash, silicon revision. Hello_world example is modified to print out the information about the chip. The example is also simplified by moving all code into the main task. Ref TW12031. See merge request !549
367 lines
10 KiB
C
367 lines
10 KiB
C
// Copyright 2013-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string.h>
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#include "esp_system.h"
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#include "esp_attr.h"
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#include "esp_wifi.h"
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#include "esp_wifi_internal.h"
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#include "esp_log.h"
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#include "sdkconfig.h"
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#include "rom/efuse.h"
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#include "rom/cache.h"
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#include "rom/uart.h"
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#include "soc/dport_reg.h"
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#include "soc/efuse_reg.h"
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#include "soc/rtc_cntl_reg.h"
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#include "soc/timer_group_reg.h"
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#include "soc/timer_group_struct.h"
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#include "soc/cpu.h"
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#include "soc/rtc.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/xtensa_api.h"
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static const char* TAG = "system_api";
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static uint8_t base_mac_addr[6] = { 0 };
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void system_init()
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{
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}
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esp_err_t esp_base_mac_addr_set(uint8_t *mac)
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{
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if (mac == NULL) {
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ESP_LOGE(TAG, "Base MAC address is NULL");
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abort();
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}
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memcpy(base_mac_addr, mac, 6);
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return ESP_OK;
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}
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esp_err_t esp_base_mac_addr_get(uint8_t *mac)
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{
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uint8_t null_mac[6] = {0};
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if (memcmp(base_mac_addr, null_mac, 6) == 0) {
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ESP_LOGI(TAG, "Base MAC address is not set, read default base MAC address from BLK0 of EFUSE");
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return ESP_ERR_INVALID_MAC;
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}
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memcpy(mac, base_mac_addr, 6);
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return ESP_OK;
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}
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esp_err_t esp_efuse_mac_get_custom(uint8_t *mac)
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{
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uint32_t mac_low;
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uint32_t mac_high;
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uint8_t efuse_crc;
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uint8_t calc_crc;
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uint8_t version = REG_READ(EFUSE_BLK3_RDATA5_REG) >> 24;
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if (version != 1) {
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ESP_LOGE(TAG, "Base MAC address from BLK3 of EFUSE version error, version = %d", version);
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return ESP_ERR_INVALID_VERSION;
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}
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mac_low = REG_READ(EFUSE_BLK3_RDATA1_REG);
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mac_high = REG_READ(EFUSE_BLK3_RDATA0_REG);
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mac[0] = mac_high >> 8;
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mac[1] = mac_high >> 16;
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mac[2] = mac_high >> 24;
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mac[3] = mac_low;
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mac[4] = mac_low >> 8;
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mac[5] = mac_low >> 16;
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efuse_crc = mac_high;
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calc_crc = esp_crc8(mac, 6);
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if (efuse_crc != calc_crc) {
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ESP_LOGE(TAG, "Base MAC address from BLK3 of EFUSE CRC error, efuse_crc = 0x%02x; calc_crc = 0x%02x", efuse_crc, calc_crc);
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return ESP_ERR_INVALID_CRC;
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}
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return ESP_OK;
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}
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esp_err_t esp_efuse_mac_get_default(uint8_t* mac)
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{
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uint32_t mac_low;
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uint32_t mac_high;
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uint8_t efuse_crc;
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uint8_t calc_crc;
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mac_low = REG_READ(EFUSE_BLK0_RDATA1_REG);
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mac_high = REG_READ(EFUSE_BLK0_RDATA2_REG);
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mac[0] = mac_high >> 8;
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mac[1] = mac_high;
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mac[2] = mac_low >> 24;
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mac[3] = mac_low >> 16;
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mac[4] = mac_low >> 8;
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mac[5] = mac_low;
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efuse_crc = mac_high >> 16;
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calc_crc = esp_crc8(mac, 6);
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if (efuse_crc != calc_crc) {
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// Small range of MAC addresses are accepted even if CRC is invalid.
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// These addresses are reserved for Espressif internal use.
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if ((mac_high & 0xFFFF) == 0x18fe) {
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if ((mac_low >= 0x346a85c7) && (mac_low <= 0x346a85f8)) {
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return ESP_OK;
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}
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} else {
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ESP_LOGE(TAG, "Base MAC address from BLK0 of EFUSE CRC error, efuse_crc = 0x%02x; calc_crc = 0x%02x", efuse_crc, calc_crc);
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abort();
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}
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}
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return ESP_OK;
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}
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esp_err_t system_efuse_read_mac(uint8_t *mac) __attribute__((alias("esp_efuse_mac_get_default")));
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esp_err_t esp_efuse_read_mac(uint8_t *mac) __attribute__((alias("esp_efuse_mac_get_default")));
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esp_err_t esp_derive_mac(uint8_t* local_mac, const uint8_t* universal_mac)
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{
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uint8_t idx;
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if (local_mac == NULL || universal_mac == NULL) {
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ESP_LOGE(TAG, "mac address param is NULL");
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return ESP_ERR_INVALID_ARG;
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}
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memcpy(local_mac, universal_mac, 6);
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for (idx = 0; idx < 64; idx++) {
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local_mac[0] = universal_mac[0] | 0x02;
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local_mac[0] ^= idx << 2;
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if (memcmp(local_mac, universal_mac, 6)) {
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break;
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}
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}
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return ESP_OK;
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}
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esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type)
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{
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uint8_t efuse_mac[6];
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if (mac == NULL) {
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ESP_LOGE(TAG, "mac address param is NULL");
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return ESP_ERR_INVALID_ARG;
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}
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if (type < ESP_MAC_WIFI_STA || type > ESP_MAC_ETH) {
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ESP_LOGE(TAG, "mac type is incorrect");
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return ESP_ERR_INVALID_ARG;
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}
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_Static_assert(UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR \
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|| UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR, \
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"incorrect NUM_MAC_ADDRESS_FROM_EFUSE value");
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if (esp_base_mac_addr_get(efuse_mac) != ESP_OK) {
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esp_efuse_mac_get_default(efuse_mac);
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}
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switch (type) {
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case ESP_MAC_WIFI_STA:
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memcpy(mac, efuse_mac, 6);
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break;
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case ESP_MAC_WIFI_SOFTAP:
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if (UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR) {
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memcpy(mac, efuse_mac, 6);
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mac[5] += 1;
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}
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else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
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esp_derive_mac(mac, efuse_mac);
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}
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break;
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case ESP_MAC_BT:
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memcpy(mac, efuse_mac, 6);
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if (UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR) {
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mac[5] += 2;
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}
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else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
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mac[5] += 1;
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}
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break;
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case ESP_MAC_ETH:
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if (UNIVERSAL_MAC_ADDR_NUM == FOUR_UNIVERSAL_MAC_ADDR) {
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memcpy(mac, efuse_mac, 6);
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mac[5] += 3;
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}
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else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
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efuse_mac[5] += 1;
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esp_derive_mac(mac, efuse_mac);
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}
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break;
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default:
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ESP_LOGW(TAG, "incorrect mac type");
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break;
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}
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return ESP_OK;
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}
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void esp_restart_noos() __attribute__ ((noreturn));
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void IRAM_ATTR esp_restart(void)
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{
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#ifdef CONFIG_WIFI_ENABLED
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esp_wifi_stop();
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#endif
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// Disable scheduler on this core.
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vTaskSuspendAll();
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esp_restart_noos();
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}
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/* "inner" restart function for after RTOS, interrupts & anything else on this
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* core are already stopped. Stalls other core, resets hardware,
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* triggers restart.
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*/
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void IRAM_ATTR esp_restart_noos()
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{
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const uint32_t core_id = xPortGetCoreID();
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const uint32_t other_core_id = core_id == 0 ? 1 : 0;
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esp_cpu_stall(other_core_id);
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// We need to disable TG0/TG1 watchdogs
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// First enable RTC watchdog to be on the safe side
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REG_WRITE(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
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REG_WRITE(RTC_CNTL_WDTCONFIG0_REG,
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RTC_CNTL_WDT_FLASHBOOT_MOD_EN_M |
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(1 << RTC_CNTL_WDT_SYS_RESET_LENGTH_S) |
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(1 << RTC_CNTL_WDT_CPU_RESET_LENGTH_S) );
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REG_WRITE(RTC_CNTL_WDTCONFIG1_REG, 128000);
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// Disable TG0/TG1 watchdogs
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TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
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TIMERG0.wdt_config0.en = 0;
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TIMERG0.wdt_wprotect=0;
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TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
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TIMERG1.wdt_config0.en = 0;
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TIMERG1.wdt_wprotect=0;
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// Disable all interrupts
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xt_ints_off(0xFFFFFFFF);
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// Disable cache
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Cache_Read_Disable(0);
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Cache_Read_Disable(1);
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// Flush any data left in UART FIFOs
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uart_tx_wait_idle(0);
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uart_tx_wait_idle(1);
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uart_tx_wait_idle(2);
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// Reset wifi/bluetooth/ethernet/sdio (bb/mac)
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DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,
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DPORT_BB_RST | DPORT_FE_RST | DPORT_MAC_RST |
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DPORT_BT_RST | DPORT_BTMAC_RST | DPORT_SDIO_RST |
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DPORT_SDIO_HOST_RST | DPORT_EMAC_RST | DPORT_MACPWR_RST |
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DPORT_RW_BTMAC_RST | DPORT_RW_BTLP_RST);
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DPORT_REG_WRITE(DPORT_CORE_RST_EN_REG, 0);
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// Reset timer/spi/uart
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DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG,
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DPORT_TIMERS_RST | DPORT_SPI_RST_1 | DPORT_UART_RST);
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DPORT_REG_WRITE(DPORT_PERIP_RST_EN_REG, 0);
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// Set CPU back to XTAL source, no PLL, same as hard reset
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rtc_clk_cpu_freq_set(RTC_CPU_FREQ_XTAL);
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// Reset CPUs
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if (core_id == 0) {
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// Running on PRO CPU: APP CPU is stalled. Can reset both CPUs.
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SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG,
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RTC_CNTL_SW_PROCPU_RST_M | RTC_CNTL_SW_APPCPU_RST_M);
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} else {
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// Running on APP CPU: need to reset PRO CPU and unstall it,
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// then stall APP CPU
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SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_PROCPU_RST_M);
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esp_cpu_unstall(0);
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esp_cpu_stall(1);
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}
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while(true) {
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;
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}
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}
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void system_restart(void) __attribute__((alias("esp_restart")));
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void system_restore(void)
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{
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esp_wifi_restore();
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}
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uint32_t esp_get_free_heap_size(void)
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{
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return xPortGetFreeHeapSize();
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}
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uint32_t system_get_free_heap_size(void) __attribute__((alias("esp_get_free_heap_size")));
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const char* system_get_sdk_version(void)
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{
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return "master";
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}
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const char* esp_get_idf_version(void)
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{
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return IDF_VER;
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}
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static void get_chip_info_esp32(esp_chip_info_t* out_info)
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{
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uint32_t reg = REG_READ(EFUSE_BLK0_RDATA3_REG);
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memset(out_info, 0, sizeof(*out_info));
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if ((reg & EFUSE_RD_CHIP_VER_REV1_M) != 0) {
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out_info->revision = 1;
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}
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if ((reg & EFUSE_RD_CHIP_VER_DIS_APP_CPU_M) == 0) {
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out_info->cores = 2;
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} else {
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out_info->cores = 1;
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}
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out_info->features = CHIP_FEATURE_WIFI_BGN;
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if ((reg & EFUSE_RD_CHIP_VER_DIS_BT_M) == 0) {
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out_info->features |= CHIP_FEATURE_BT | CHIP_FEATURE_BLE;
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}
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if (((reg & EFUSE_RD_CHIP_VER_PKG_M) >> EFUSE_RD_CHIP_VER_PKG_S) ==
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EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
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out_info->features |= CHIP_FEATURE_EMB_FLASH;
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}
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}
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void esp_chip_info(esp_chip_info_t* out_info)
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{
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// Only ESP32 is supported now, in the future call one of the
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// chip-specific functions based on sdkconfig choice
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return get_chip_info_esp32(out_info);
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}
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