564 lines
20 KiB
C
564 lines
20 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string.h>
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#include <stdbool.h>
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#include "soc/soc_memory_layout.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/xtensa_context.h" // for exception register stack structure
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#include "esp_core_dump_priv.h"
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const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump_port";
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#define COREDUMP_EM_XTENSA 0x5E
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#define COREDUMP_INVALID_CAUSE_VALUE 0xFFFF
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#define COREDUMP_EXTRA_REG_NUM 16
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#define COREDUMP_FAKE_STACK_START 0x20000000
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#define COREDUMP_FAKE_STACK_LIMIT 0x30000000
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#define COREDUMP_GET_REG_PAIR(reg_idx, reg_ptr) { *(uint32_t*)(reg_ptr++) = (uint32_t)reg_idx; \
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RSR(reg_idx, *(uint32_t*)(reg_ptr++)); \
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}
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#define COREDUMP_GET_EPC(reg, ptr) \
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if (reg - EPC_1 + 1 <= XCHAL_NUM_INTLEVELS) COREDUMP_GET_REG_PAIR(reg, ptr)
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#define COREDUMP_GET_EPS(reg, ptr) \
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if (reg - EPS_2 + 2 <= XCHAL_NUM_INTLEVELS) COREDUMP_GET_REG_PAIR(reg, ptr)
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// Enumeration of registers of exception stack frame
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// and solicited stack frame
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typedef enum
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{
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// XT_SOL_EXIT = 0,
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XT_SOL_PC = 1,
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XT_SOL_PS = 2,
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// XT_SOL_NEXT = 3,
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XT_SOL_AR_START = 4,
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XT_SOL_AR_NUM = 4,
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// XT_SOL_FRMSZ = 8,
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XT_STK_EXIT = 0,
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XT_STK_PC = 1,
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XT_STK_PS = 2,
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XT_STK_AR_START = 3,
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XT_STK_AR_NUM = 16,
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XT_STK_SAR = 19,
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XT_STK_EXCCAUSE = 20,
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XT_STK_EXCVADDR = 21,
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XT_STK_LBEG = 22,
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XT_STK_LEND = 23,
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XT_STK_LCOUNT = 24,
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//XT_STK_FRMSZ = 25,
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} stk_frame_t;
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// Xtensa ELF core file register set representation ('.reg' section).
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// Copied from target-side ELF header <xtensa/elf.h>.
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typedef struct
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{
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uint32_t pc;
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uint32_t ps;
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uint32_t lbeg;
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uint32_t lend;
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uint32_t lcount;
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uint32_t sar;
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uint32_t windowstart;
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uint32_t windowbase;
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uint32_t reserved[8+48];
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uint32_t ar[XCHAL_NUM_AREGS];
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} __attribute__((packed)) xtensa_gregset_t;
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typedef struct
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{
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uint32_t reg_index;
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uint32_t reg_val;
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} __attribute__((packed)) core_dump_reg_pair_t;
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typedef struct
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{
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uint32_t crashed_task_tcb;
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core_dump_reg_pair_t exccause;
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core_dump_reg_pair_t excvaddr;
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core_dump_reg_pair_t extra_regs[COREDUMP_EXTRA_REG_NUM];
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} __attribute__((packed)) xtensa_extra_info_t;
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// Xtensa Program Status for GDB
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typedef struct
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{
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uint32_t si_signo;
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uint32_t si_code;
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uint32_t si_errno;
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uint16_t pr_cursig;
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uint16_t pr_pad0;
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uint32_t pr_sigpend;
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uint32_t pr_sighold;
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uint32_t pr_pid;
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uint32_t pr_ppid;
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uint32_t pr_pgrp;
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uint32_t pr_sid;
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uint64_t pr_utime;
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uint64_t pr_stime;
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uint64_t pr_cutime;
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uint64_t pr_cstime;
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} __attribute__((packed)) xtensa_pr_status_t;
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typedef struct
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{
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xtensa_pr_status_t pr_status;
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xtensa_gregset_t regs;
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// Todo: acc to xtensa_gregset_t number of regs must be 128,
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// but gdb complains when it less than 129
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uint32_t reserved;
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} __attribute__((packed)) xtensa_elf_reg_dump_t;
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extern uint8_t port_IntStack;
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#if CONFIG_ESP32_ENABLE_COREDUMP
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static uint32_t s_total_length = 0;
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static XtExcFrame s_fake_stack_frame = {
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.pc = (UBaseType_t) COREDUMP_FAKE_STACK_START, // task entrypoint fake_ptr
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.a0 = (UBaseType_t) 0, // to terminate GDB backtrace
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.a1 = (UBaseType_t) (COREDUMP_FAKE_STACK_START + sizeof(XtExcFrame)), // physical top of stack frame
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.exit = (UBaseType_t) 0, // user exception exit dispatcher
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.ps = (PS_UM | PS_EXCM),
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.exccause = (UBaseType_t) COREDUMP_INVALID_CAUSE_VALUE,
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};
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static uint32_t s_fake_stacks_num;
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static xtensa_extra_info_t s_extra_info;
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#if ESP32_CORE_DUMP_STACK_SIZE > 0
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uint8_t s_coredump_stack[ESP32_CORE_DUMP_STACK_SIZE];
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uint8_t *s_core_dump_sp;
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static uint32_t esp_core_dump_free_stack_space(const uint8_t *pucStackByte)
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{
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uint32_t ulCount = 0U;
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while( *pucStackByte == (uint8_t)COREDUMP_STACK_FILL_BYTE ) {
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pucStackByte -= portSTACK_GROWTH;
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ulCount++;
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}
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ulCount /= (uint32_t)sizeof(uint8_t);
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return (uint32_t)ulCount;
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}
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#endif
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void esp_core_dump_report_stack_usage(void)
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{
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#if ESP32_CORE_DUMP_STACK_SIZE > 0
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uint32_t bytes_free = esp_core_dump_free_stack_space(s_coredump_stack);
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ESP_COREDUMP_LOGD("Core dump used %u bytes on stack. %u bytes left free.",
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s_core_dump_sp - s_coredump_stack - bytes_free, bytes_free);
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#endif
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}
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#if CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256
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// function to calculate SHA256 for solid data array
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int esp_core_dump_sha(mbedtls_sha256_context *ctx,
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const unsigned char *input,
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size_t ilen,
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unsigned char output[32] )
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{
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assert(input);
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mbedtls_sha256_init(ctx);
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if((mbedtls_sha256_starts_ret(ctx, 0) != 0)) goto exit;
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#if CONFIG_MBEDTLS_HARDWARE_SHA
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// set software mode for SHA calculation
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ctx->mode = ESP_MBEDTLS_SHA256_SOFTWARE;
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#endif
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if((mbedtls_sha256_update_ret(ctx, input, ilen) != 0)) goto exit;
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if((mbedtls_sha256_finish_ret(ctx, output) != 0)) goto exit;
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esp_core_dump_print_sha256(DRAM_STR("Coredump SHA256"), (void*)output);
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s_total_length = ilen;
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exit:
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mbedtls_sha256_free(ctx);
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return ilen;
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}
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void esp_core_dump_print_sha256(const char* msg, const uint8_t* sha_output)
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{
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ets_printf(DRAM_STR("%s='"), msg);
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for (int i = 0; i < COREDUMP_SHA256_LEN; i++) {
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ets_printf(DRAM_STR("%02x"), sha_output[i]);
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}
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ets_printf(DRAM_STR("'\r\n"));
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}
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#endif
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void esp_core_dump_checksum_init(core_dump_write_data_t* wr_data)
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{
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if (wr_data) {
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#if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32
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wr_data->crc = 0;
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#elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256
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mbedtls_sha256_init(&wr_data->ctx);
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(void)mbedtls_sha256_starts_ret(&wr_data->ctx, 0);
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#endif
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s_total_length = 0;
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}
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}
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void esp_core_dump_checksum_update(core_dump_write_data_t* wr_data, void* data, size_t data_len)
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{
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if (wr_data && data) {
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#if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32
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wr_data->crc = crc32_le(wr_data->crc, data, data_len);
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#elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256
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#if CONFIG_MBEDTLS_HARDWARE_SHA
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// set software mode of SHA calculation
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wr_data->ctx.mode = ESP_MBEDTLS_SHA256_SOFTWARE;
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#endif
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(void)mbedtls_sha256_update_ret(&wr_data->ctx, data, data_len);
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#endif
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s_total_length += data_len; // keep counter of cashed bytes
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} else {
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ESP_COREDUMP_LOGE("Wrong write data info!");
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}
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}
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uint32_t esp_core_dump_checksum_finish(core_dump_write_data_t* wr_data, void** chs_ptr)
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{
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// get core dump checksum
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uint32_t chs_len = 0;
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#if CONFIG_ESP32_COREDUMP_CHECKSUM_CRC32
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if (chs_ptr) {
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wr_data->crc = wr_data->crc;
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*chs_ptr = (void*)&wr_data->crc;
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ESP_COREDUMP_LOG_PROCESS("Dump data CRC = 0x%x, offset = 0x%x", wr_data->crc, wr_data->off);
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}
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chs_len = sizeof(wr_data->crc);
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#elif CONFIG_ESP32_COREDUMP_CHECKSUM_SHA256
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if (chs_ptr) {
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ESP_COREDUMP_LOG_PROCESS("Dump data offset = %d", wr_data->off);
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(void)mbedtls_sha256_finish_ret(&wr_data->ctx, (uint8_t*)&wr_data->sha_output);
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*chs_ptr = (void*)&wr_data->sha_output[0];
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mbedtls_sha256_free(&wr_data->ctx);
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}
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chs_len = sizeof(wr_data->sha_output);
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#endif
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ESP_COREDUMP_LOG_PROCESS("Total length of hashed data: %d!", s_total_length);
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return chs_len;
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}
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inline uint16_t esp_core_dump_get_arch_id()
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{
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return COREDUMP_EM_XTENSA;
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}
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inline bool esp_core_dump_mem_seg_is_sane(uint32_t addr, uint32_t sz)
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{
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//TODO: currently core dump supports memory segments in DRAM only, external SRAM not supported yet
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return esp_ptr_in_dram((void *)addr) && esp_ptr_in_dram((void *)(addr+sz-1));
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}
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inline bool esp_core_dump_task_stack_end_is_sane(uint32_t sp)
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{
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//TODO: currently core dump supports stacks in DRAM only, external SRAM not supported yet
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return esp_ptr_in_dram((void *)sp);
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}
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inline bool esp_core_dump_tcb_addr_is_sane(uint32_t addr)
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{
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return esp_core_dump_mem_seg_is_sane(addr, COREDUMP_TCB_SIZE);
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}
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uint32_t esp_core_dump_get_tasks_snapshot(core_dump_task_header_t* const tasks,
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const uint32_t snapshot_size)
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{
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uint32_t tcb_sz; // unused
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uint32_t task_num = (uint32_t)uxTaskGetSnapshotAll((TaskSnapshot_t*)tasks,
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(UBaseType_t)snapshot_size,
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(UBaseType_t*)&tcb_sz);
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return task_num;
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}
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inline uint32_t esp_core_dump_get_isr_stack_end(void)
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{
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return (uint32_t)((uint8_t *)&port_IntStack + (xPortGetCoreID()+1)*configISR_STACK_SIZE);
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}
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uint32_t esp_core_dump_get_stack(core_dump_task_header_t *task_snapshot,
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uint32_t *stk_vaddr, uint32_t *stk_len)
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{
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if (task_snapshot->stack_end > task_snapshot->stack_start) {
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*stk_len = task_snapshot->stack_end - task_snapshot->stack_start;
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*stk_vaddr = task_snapshot->stack_start;
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} else {
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*stk_len = task_snapshot->stack_start - task_snapshot->stack_end;
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*stk_vaddr = task_snapshot->stack_end;
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}
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if (*stk_vaddr >= COREDUMP_FAKE_STACK_START && *stk_vaddr < COREDUMP_FAKE_STACK_LIMIT) {
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return (uint32_t)&s_fake_stack_frame;
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}
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return *stk_vaddr;
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}
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// The function creates small fake stack for task as deep as exception frame size
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// It is required for gdb to take task into account but avoid back trace of stack.
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// The espcoredump.py script is able to recognize that task is broken
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static void *esp_core_dump_get_fake_stack(uint32_t *stk_len)
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{
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*stk_len = sizeof(s_fake_stack_frame);
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return (uint8_t*)COREDUMP_FAKE_STACK_START + sizeof(s_fake_stack_frame)*s_fake_stacks_num++;
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}
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static core_dump_reg_pair_t *esp_core_dump_get_epc_regs(core_dump_reg_pair_t* src)
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{
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uint32_t* reg_ptr = (uint32_t*)src;
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// get InterruptException program counter registers
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COREDUMP_GET_EPC(EPC_1, reg_ptr);
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COREDUMP_GET_EPC(EPC_2, reg_ptr);
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COREDUMP_GET_EPC(EPC_3, reg_ptr);
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COREDUMP_GET_EPC(EPC_4, reg_ptr);
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COREDUMP_GET_EPC(EPC_5, reg_ptr);
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COREDUMP_GET_EPC(EPC_6, reg_ptr);
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COREDUMP_GET_EPC(EPC_7, reg_ptr);
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return (core_dump_reg_pair_t*)reg_ptr;
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}
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static core_dump_reg_pair_t *esp_core_dump_get_eps_regs(core_dump_reg_pair_t* src)
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{
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uint32_t* reg_ptr = (uint32_t*)src;
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// get InterruptException processor state registers
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COREDUMP_GET_EPS(EPS_2, reg_ptr);
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COREDUMP_GET_EPS(EPS_3, reg_ptr);
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COREDUMP_GET_EPS(EPS_4, reg_ptr);
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COREDUMP_GET_EPS(EPS_5, reg_ptr);
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COREDUMP_GET_EPS(EPS_6, reg_ptr);
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COREDUMP_GET_EPS(EPS_7, reg_ptr);
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return (core_dump_reg_pair_t*)reg_ptr;
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}
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// Returns list of registers (in GDB format) from xtensa stack frame
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static esp_err_t esp_core_dump_get_regs_from_stack(void* stack_addr,
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size_t size,
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xtensa_gregset_t* regs)
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{
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XtExcFrame* exc_frame = (XtExcFrame*)stack_addr;
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uint32_t* stack_arr = (uint32_t*)stack_addr;
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if (size < sizeof(XtExcFrame)) {
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ESP_COREDUMP_LOGE("Too small stack to keep frame: %d bytes!", size);
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return ESP_FAIL;
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}
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// Stack frame type indicator is always the first item
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uint32_t rc = exc_frame->exit;
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// is this current crashed task?
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if (rc == COREDUMP_CURR_TASK_MARKER)
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{
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s_extra_info.exccause.reg_val = exc_frame->exccause;
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s_extra_info.exccause.reg_index = EXCCAUSE;
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s_extra_info.excvaddr.reg_val = exc_frame->excvaddr;
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s_extra_info.excvaddr.reg_index = EXCVADDR;
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// get InterruptException registers into extra_info
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core_dump_reg_pair_t *regs_ptr = esp_core_dump_get_eps_regs(s_extra_info.extra_regs);
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esp_core_dump_get_epc_regs(regs_ptr);
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} else {
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// initialize EXCCAUSE and EXCVADDR members of frames for all the tasks,
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// except for the crashed one
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exc_frame->exccause = COREDUMP_INVALID_CAUSE_VALUE;
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exc_frame->excvaddr = 0;
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}
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if (rc != 0) {
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regs->pc = exc_frame->pc;
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regs->ps = exc_frame->ps;
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for (int i = 0; i < XT_STK_AR_NUM; i++) {
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regs->ar[i] = stack_arr[XT_STK_AR_START + i];
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}
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regs->sar = exc_frame->sar;
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#if CONFIG_IDF_TARGET_ESP32
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regs->lbeg = exc_frame->lbeg;
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regs->lend = exc_frame->lend;
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regs->lcount = exc_frame->lcount;
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#endif
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// FIXME: crashed and some running tasks (e.g. prvIdleTask) have EXCM bit set
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// and GDB can not unwind callstack properly (it implies not windowed call0)
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if (regs->ps & PS_UM) {
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regs->ps &= ~PS_EXCM;
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}
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} else {
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regs->pc = stack_arr[XT_SOL_PC];
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regs->ps = stack_arr[XT_SOL_PS];
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for (int i = 0; i < XT_SOL_AR_NUM; i++) {
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regs->ar[i] = stack_arr[XT_SOL_AR_START + i];
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}
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regs->pc = (regs->pc & 0x3fffffff);
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if (regs->pc & 0x80000000) {
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regs->pc = (regs->pc & 0x3fffffff);
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}
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if (regs->ar[0] & 0x80000000) {
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regs->ar[0] = (regs->ar[0] & 0x3fffffff);
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}
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}
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return ESP_OK;
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}
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uint32_t esp_core_dump_get_task_regs_dump(core_dump_task_header_t *task, void **reg_dump)
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{
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uint32_t stack_vaddr, stack_paddr, stack_len;
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static xtensa_elf_reg_dump_t s_reg_dump = { 0 };
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stack_paddr = esp_core_dump_get_stack(task, &stack_vaddr, &stack_len);
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ESP_COREDUMP_LOG_PROCESS("Add regs for task 0x%x", task->tcb_addr);
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// initialize program status for the task
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s_reg_dump.pr_status.pr_cursig = 0;
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s_reg_dump.pr_status.pr_pid = (uint32_t)task->tcb_addr;
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// fill the gdb registers structure from stack
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esp_err_t err = esp_core_dump_get_regs_from_stack((void*)stack_paddr,
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stack_len,
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&s_reg_dump.regs);
|
|
if (err != ESP_OK) {
|
|
ESP_COREDUMP_LOGE("Error while registers processing.");
|
|
}
|
|
*reg_dump = &s_reg_dump;
|
|
return sizeof(s_reg_dump);
|
|
}
|
|
|
|
inline void* esp_core_dump_get_current_task_handle()
|
|
{
|
|
return (void*)xTaskGetCurrentTaskHandleForCPU(xPortGetCoreID());
|
|
}
|
|
|
|
bool esp_core_dump_check_task(void *frame,
|
|
core_dump_task_header_t *task,
|
|
bool* is_current,
|
|
bool* stack_is_valid)
|
|
{
|
|
XtExcFrame *exc_frame = frame;
|
|
bool is_curr_task = false;
|
|
bool stack_is_sane = false;
|
|
uint32_t stk_size = 0;
|
|
|
|
if (!esp_core_dump_tcb_addr_is_sane((uint32_t)task->tcb_addr)) {
|
|
ESP_COREDUMP_LOG_PROCESS("Bad TCB addr=%x!", task->tcb_addr);
|
|
return false;
|
|
}
|
|
|
|
is_curr_task = task->tcb_addr == esp_core_dump_get_current_task_handle();
|
|
if (is_curr_task) {
|
|
// Set correct stack top for current task; only modify if we came from the task,
|
|
// and not an ISR that crashed.
|
|
if (!xPortInterruptedFromISRContext()) {
|
|
task->stack_start = (uint32_t)exc_frame;
|
|
}
|
|
exc_frame->exit = COREDUMP_CURR_TASK_MARKER;
|
|
s_extra_info.crashed_task_tcb = (uint32_t)task->tcb_addr;
|
|
}
|
|
|
|
stack_is_sane = esp_core_dump_check_stack(task->stack_start, task->stack_end);
|
|
if (!stack_is_sane) {
|
|
// Skip saving of invalid task if stack corrupted
|
|
ESP_COREDUMP_LOG_PROCESS("Task (TCB:%x), stack is corrupted (%x, %x)",
|
|
task->tcb_addr,
|
|
task->stack_start,
|
|
task->stack_end);
|
|
task->stack_start = (uint32_t)esp_core_dump_get_fake_stack(&stk_size);
|
|
task->stack_end = (uint32_t)(task->stack_start + stk_size);
|
|
ESP_COREDUMP_LOG_PROCESS("Task (TCB:%x), use start, end (%x, %x)",
|
|
task->tcb_addr,
|
|
task->stack_start,
|
|
task->stack_end);
|
|
}
|
|
|
|
if (is_curr_task) {
|
|
if (!stack_is_sane)
|
|
ESP_COREDUMP_LOG_PROCESS("Current task 0x%x is broken!", task->tcb_addr);
|
|
ESP_COREDUMP_LOG_PROCESS("Current task (TCB:%x), EXIT/PC/PS/A0/SP %x %x %x %x %x",
|
|
task->tcb_addr,
|
|
exc_frame->exit,
|
|
exc_frame->pc,
|
|
exc_frame->ps,
|
|
exc_frame->a0,
|
|
exc_frame->a1);
|
|
} else {
|
|
XtSolFrame *task_frame = (XtSolFrame *)task->stack_start;
|
|
if (stack_is_sane) {
|
|
if (task_frame->exit == 0) {
|
|
ESP_COREDUMP_LOG_PROCESS("Task (TCB:%x), EXIT/PC/PS/A0/SP %x %x %x %x %x",
|
|
task->tcb_addr,
|
|
task_frame->exit,
|
|
task_frame->pc,
|
|
task_frame->ps,
|
|
task_frame->a0,
|
|
task_frame->a1);
|
|
} else {
|
|
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
|
|
XtExcFrame *task_frame2 = (XtExcFrame *)task->stack_start;
|
|
task_frame2->exccause = COREDUMP_INVALID_CAUSE_VALUE;
|
|
ESP_COREDUMP_LOG_PROCESS("Task (TCB:%x) EXIT/PC/PS/A0/SP %x %x %x %x %x",
|
|
task->tcb_addr,
|
|
task_frame2->exit,
|
|
task_frame2->pc,
|
|
task_frame2->ps,
|
|
task_frame2->a0,
|
|
task_frame2->a1);
|
|
#endif
|
|
}
|
|
} else {
|
|
ESP_COREDUMP_LOG_PROCESS("Task (TCB:%x), stack_start=%x is incorrect, skip registers printing.",
|
|
task->tcb_addr, task->stack_start);
|
|
|
|
}
|
|
}
|
|
|
|
if (is_current) {
|
|
*is_current = is_curr_task;
|
|
}
|
|
if (stack_is_valid) {
|
|
*stack_is_valid = stack_is_sane;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
bool esp_core_dump_check_stack(uint32_t stack_start, uint32_t stack_end)
|
|
{
|
|
uint32_t len = stack_end - stack_start;
|
|
bool task_is_valid = false;
|
|
// Check task's stack
|
|
if (!esp_stack_ptr_is_sane(stack_start) || !esp_core_dump_task_stack_end_is_sane(stack_end) ||
|
|
(len > COREDUMP_MAX_TASK_STACK_SIZE)) {
|
|
// Check if current task stack is corrupted
|
|
task_is_valid = false;
|
|
} else {
|
|
ESP_COREDUMP_LOG_PROCESS("Stack len = %lu (%x %x)", len, stack_start, stack_end);
|
|
task_is_valid = true;
|
|
}
|
|
return task_is_valid;
|
|
}
|
|
|
|
void esp_core_dump_init_extra_info()
|
|
{
|
|
s_extra_info.crashed_task_tcb = COREDUMP_CURR_TASK_MARKER;
|
|
// Initialize exccause register to default value (required if current task corrupted)
|
|
s_extra_info.exccause.reg_val = COREDUMP_INVALID_CAUSE_VALUE;
|
|
s_extra_info.exccause.reg_index = EXCCAUSE;
|
|
}
|
|
|
|
uint32_t esp_core_dump_get_extra_info(void **info)
|
|
{
|
|
*info = &s_extra_info;
|
|
return sizeof(s_extra_info);
|
|
}
|
|
|
|
#endif
|