449d2a6367
Contains two different component folders per each implementation (serial_master and serial_slave) with concrete ports. Added common public api for master and slave and common interface for master and slave implementation. Add support of cmake system (added cmake files). Added sdkconfig.defaults files for slave and master modbus examples. Updated make file and KConfig for freemodbus component Update according to review and fix doxygen warnings Fix Doxyfile to pass documentation build Update headers and change interface file names as per review comments Merge branch feature/freemodbus_move_rs485_mode_control Update after review: The stack modbus folder updated to support master and slave ports together and moved into freemodbus/modbus Stack and port files updated to remove duplicated simbols Make file, KConfig and CMakeLists.txt updated to compile master and slave stacks, common interface and concrete implementations of ports Stack callback functions execute callbacks using interface pointer from concrete port implementation User can instantiate any of concrete port using common API (only one concrete port at a time) and it does not require to select port by KConfig Port pins and mode configuration moved into example files from port files to allow user select pins and port mode (customer request) Changes tested using pymodbus, ModbusPoll and communication between two boards Updated DoxyFile according to public include path Fix maximum instance size for slave (merge from master of customer issue) Fix critical section issue TW#28622 (change spin lock based critical section to semaphore) Move serial port files into component port folder for master and slave accordingly Fix example issue showed in the log when IO slave is not configured correctly Fix conflicts while merging from origin/master Fix errors handling in modbus controller interface + some final corrections according to review Update maximum allowed number of slaves in the network segment Fix bug with incorrect coils read mask Closes https://github.com/espressif/esp-idf/issues/858
72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
/* Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef PORT_COMMON_H_
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#define PORT_COMMON_H_
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#include "freertos/FreeRTOS.h"
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#include "freertos/xtensa_api.h"
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#include "freertos/portmacro.h"
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#include "esp_log.h" // for ESP_LOGE macro
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#define INLINE inline
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#define PR_BEGIN_EXTERN_C extern "C" {
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#define PR_END_EXTERN_C }
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#define MB_PORT_TAG "MB_PORT_COMMON"
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#define MB_PORT_CHECK(a, ret_val, str, ...) \
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if (!(a)) { \
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ESP_LOGE(MB_PORT_TAG, "%s(%u): " str, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
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return (ret_val); \
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}
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#ifdef __cplusplus
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PR_BEGIN_EXTERN_C
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#endif /* __cplusplus */
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#ifndef TRUE
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#define TRUE 1
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#endif
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#ifndef FALSE
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#define FALSE 0
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#endif
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typedef char BOOL;
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typedef unsigned char UCHAR;
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typedef char CHAR;
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typedef unsigned short USHORT;
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typedef short SHORT;
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typedef unsigned long ULONG;
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typedef long LONG;
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void vMBPortEnterCritical( );
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void vMBPortExitCritical( );
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#define ENTER_CRITICAL_SECTION( ) { ESP_LOGD(MB_PORT_TAG,"%s: Port enter critical.", __func__); \
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vMBPortEnterCritical(); }
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#define EXIT_CRITICAL_SECTION( ) { vMBPortExitCritical(); \
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ESP_LOGD(MB_PORT_TAG,"%s: Port exit critical", __func__); }
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#ifdef __cplusplus
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PR_END_EXTERN_C
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#endif /* __cplusplus */
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#endif /* PORT_COMMON_H_ */
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