Using xxx_periph.h in whole IDF instead of xxx_reg.h, xxx_struct.h, xxx_channel.h ... . Cleaned up header files from unnecessary headers (releated to soc/... headers).
121 lines
4 KiB
C
121 lines
4 KiB
C
/* Application Trace to Host Example
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This example code is in the Public Domain (or CC0 licensed, at your option.)
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Unless required by applicable law or agreed to in writing, this
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software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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CONDITIONS OF ANY KIND, either express or implied.
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*/
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#include <stdio.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "esp_app_trace.h"
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#include "esp_log.h"
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#include "soc/rtc_periph.h"
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#include "soc/sens_periph.h"
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#include "driver/adc.h"
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#include "driver/dac.h"
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#define ADC1_TEST_CHANNEL (ADC1_CHANNEL_6)
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#define TEST_SAMPLING_PERIOD 20
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/*
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* When setting custom divider of RTC 8 MHz clock in menuconfig,
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* use the following values to set the CW frequency:
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* ~ 50 Hz (entered below)
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* RTC_CLK_8M_DIV 7
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* CW_FREQUENCY_STEP 3
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* ~ 60 Hz
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* RTC_CLK_8M_DIV 1
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* CW_FREQUENCY_STEP 1
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*/
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#ifdef CONFIG_CUSTOM_RTC_CLK_8M_DIV
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#define RTC_CLK_8M_DIV 7
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#define CW_FREQUENCY_STEP 3
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#else
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#define CW_FREQUENCY_STEP 1
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#endif
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static const char *TAG = "example";
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/*
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* Enable cosine waveform generator (CW)
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* on channel 1 / GPIO25 to provide sinusoidal signal
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* It can be used instead of a live signal for testing
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* of speed of logging to the host
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* sequentially with data retrieval from ADC
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*/
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static void enable_cosine_generator(void)
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{
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// Enable tone generator common to both DAC channels 1 and 2
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SET_PERI_REG_MASK(SENS_SAR_DAC_CTRL1_REG, SENS_SW_TONE_EN);
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// Enable / connect tone tone generator on / to channel 1
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SET_PERI_REG_MASK(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_CW_EN1_M);
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// Invert MSB, otherwise part of the waveform will be inverted
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SET_PERI_REG_BITS(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_INV1, 2, SENS_DAC_INV1_S);
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// Set the frequency of waveform on CW output
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#ifdef CONFIG_CUSTOM_RTC_CLK_8M_DIV
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REG_SET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_DIV_SEL, RTC_CLK_8M_DIV);
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ESP_LOGI(TAG, "Custom divider of RTC 8 MHz clock has been set.");
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#endif
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SET_PERI_REG_BITS(SENS_SAR_DAC_CTRL1_REG, SENS_SW_FSTEP, CW_FREQUENCY_STEP, SENS_SW_FSTEP_S);
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dac_output_enable(DAC_CHANNEL_1);
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}
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/*
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* Sample data an ADC1 channel 6 / GPIO34
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* over specific 'sampling_period' in milliseconds.
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* Print out sampling result using standard ESP_LOGI() function.
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* Return the number of samples collected.
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*/
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static int adc1_sample_and_show(int sampling_period)
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{
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int i = 0;
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uint32_t sampling_start = esp_log_timestamp();
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do {
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ESP_LOGI(TAG, "Sample:%d, Value:%d", ++i, adc1_get_raw(ADC1_TEST_CHANNEL));
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} while (esp_log_timestamp() - sampling_start < sampling_period);
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return i;
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}
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/*
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* Main program loop that is sampling data on ADC
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* and logging results with application tracing to the host
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* as well as for comparison printing out sampling result to UART
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*/
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void app_main()
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{
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ESP_LOGI(TAG, "Enabling ADC1 on channel 6 / GPIO34.");
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adc1_config_width(ADC_WIDTH_BIT_12);
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adc1_config_channel_atten(ADC1_TEST_CHANNEL, ADC_ATTEN_DB_11);
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ESP_LOGI(TAG, "Enabling CW generator on DAC channel 1 / GPIO25.");
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enable_cosine_generator();
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while (1) {
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/*
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* Logging with the Application Trace
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*/
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ESP_LOGI(TAG, "Sampling ADC and sending data to the host...");
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// Route LOGx() to the host
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esp_log_set_vprintf(esp_apptrace_vprintf);
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int samples_collected = adc1_sample_and_show(TEST_SAMPLING_PERIOD);
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// Route LOGx() back to UART
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esp_log_set_vprintf(vprintf);
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// Flush collected data to the host
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esp_apptrace_flush(ESP_APPTRACE_DEST_TRAX, 100000);
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ESP_LOGI(TAG, "Collected %d samples in %d ms.\n", samples_collected, TEST_SAMPLING_PERIOD);
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/*
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* Logging to UART
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*/
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ESP_LOGI(TAG, "Sampling ADC and sending data to the UART...");
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samples_collected = adc1_sample_and_show(TEST_SAMPLING_PERIOD);
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ESP_LOGI(TAG, "Collected %d samples in %d ms.\n", samples_collected, TEST_SAMPLING_PERIOD);
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vTaskDelay(2000 / portTICK_PERIOD_MS);
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}
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}
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