524 lines
No EOL
16 KiB
C
524 lines
No EOL
16 KiB
C
#include <stdio.h>
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#include <string.h>
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#include <freertos/FreeRTOS.h>
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#include <freertos/task.h>
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#include <freertos/semphr.h>
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#include <unity.h>
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#include "esp_flash.h"
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#include "driver/spi_common.h"
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#include "esp_flash_spi_init.h"
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#include <esp_attr.h>
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#include "esp_log.h"
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#include <test_utils.h>
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#include "unity.h"
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#include "driver/spi_common.h"
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#include "driver/gpio.h"
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#include "soc/io_mux_reg.h"
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#define FUNC_SPI 1
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static uint8_t sector_buf[4096];
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// #define TEST_SPI1_CS1
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// #define TEST_SPI2_CS0
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// #define TEST_SPI3_CS0
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#define TEST_SPI_SPEED ESP_FLASH_10MHZ
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#define TEST_SPI_READ_MODE SPI_FLASH_FASTRD
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//#define FORCE_GPIO_MATRIX
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#define HSPI_PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI
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#define HSPI_PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO
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#define HSPI_PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK
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#define HSPI_PIN_NUM_HD HSPI_IOMUX_PIN_NUM_HD
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#define HSPI_PIN_NUM_WP HSPI_IOMUX_PIN_NUM_WP
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#define VSPI_PIN_NUM_MOSI VSPI_IOMUX_PIN_NUM_MOSI
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#define VSPI_PIN_NUM_MISO VSPI_IOMUX_PIN_NUM_MISO
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#define VSPI_PIN_NUM_CLK VSPI_IOMUX_PIN_NUM_CLK
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#define VSPI_PIN_NUM_HD VSPI_IOMUX_PIN_NUM_HD
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#define VSPI_PIN_NUM_WP VSPI_IOMUX_PIN_NUM_WP
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#if defined TEST_SPI1_CS1
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# define TEST_HOST SPI_HOST
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# define TEST_CS 1
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// #define TEST_CS_PIN 14
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# define TEST_CS_PIN 16 //the pin which is usually used by the PSRAM
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// #define TEST_CS_PIN 27
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# define TEST_INPUT_DELAY 0
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# define EXTRA_SPI1_CLK_IO 17 //the pin which is usually used by the PSRAM clk
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#elif defined TEST_SPI2_CS0
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# define TEST_HOST HSPI_HOST
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# define TEST_CS 0
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# define TEST_CS_PIN HSPI_IOMUX_PIN_NUM_CS
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# define TEST_INPUT_DELAY 20
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#elif defined TEST_SPI3_CS0
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# define TEST_HOST VSPI_HOST
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# define TEST_CS 0
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# define TEST_CS_PIN VSPI_IOMUX_PIN_NUM_CS
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# define TEST_INPUT_DELAY 0
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#else
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# define SKIP_EXTENDED_CHIP_TEST
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#endif
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static const char TAG[] = "test_esp_flash";
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#ifndef SKIP_EXTENDED_CHIP_TEST
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static esp_flash_t *test_chip = NULL;
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static void setup_bus(spi_host_device_t host_id)
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{
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if (host_id == SPI_HOST) {
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ESP_LOGI(TAG, "setup flash on SPI1 CS1...\n");
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//no need to initialize the bus, however the CLK may need one more output if it's on the usual place of PSRAM
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#ifdef EXTRA_SPI1_CLK_IO
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gpio_matrix_out(EXTRA_SPI1_CLK_IO, SPICLK_OUT_IDX, 0, 0);
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#endif
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//currently the SPI bus for main flash chip is initialized through GPIO matrix
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} else if (host_id == HSPI_HOST) {
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ESP_LOGI(TAG, "setup flash on SPI2 (HSPI) CS0...\n");
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spi_bus_config_t hspi_bus_cfg = {
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.mosi_io_num = HSPI_PIN_NUM_MOSI,
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.miso_io_num = HSPI_PIN_NUM_MISO,
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.sclk_io_num = HSPI_PIN_NUM_CLK,
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.quadhd_io_num = HSPI_PIN_NUM_HD,
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.quadwp_io_num = HSPI_PIN_NUM_WP,
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.max_transfer_sz = 64,
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};
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#ifdef FORCE_GPIO_MATRIX
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hspi_bus_cfg.quadhd_io_num = 23;
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#endif
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esp_err_t ret = spi_bus_initialize(host_id, &hspi_bus_cfg, 0);
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TEST_ESP_OK(ret);
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} else if (host_id == VSPI_HOST) {
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ESP_LOGI(TAG, "setup flash on SPI3 (VSPI) CS0...\n");
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spi_bus_config_t vspi_bus_cfg = {
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.mosi_io_num = VSPI_PIN_NUM_MOSI,
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.miso_io_num = VSPI_PIN_NUM_MISO,
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.sclk_io_num = VSPI_PIN_NUM_CLK,
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.quadhd_io_num = VSPI_PIN_NUM_HD,
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.quadwp_io_num = VSPI_PIN_NUM_WP,
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.max_transfer_sz = 64,
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};
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#ifdef FORCE_GPIO_MATRIX
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vspi_bus_cfg.quadhd_io_num = 23;
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#endif
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esp_err_t ret = spi_bus_initialize(host_id, &vspi_bus_cfg, 0);
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TEST_ESP_OK(ret);
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} else {
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ESP_LOGE(TAG, "invalid bus");
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}
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}
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static void release_bus(int host_id)
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{
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if (host_id == HSPI_HOST || host_id == VSPI_HOST) {
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spi_bus_free(host_id);
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}
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}
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static void setup_new_chip(esp_flash_read_mode_t io_mode, esp_flash_speed_t speed)
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{
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//the bus should be initialized before the flash is attached to the bus
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setup_bus(TEST_HOST);
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esp_flash_spi_device_config_t dev_cfg = {
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.host_id = TEST_HOST,
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.io_mode = io_mode,
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.speed = speed,
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.cs_id = TEST_CS,
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.cs_io_num = TEST_CS_PIN,
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.input_delay_ns = TEST_INPUT_DELAY,
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};
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esp_err_t err = spi_bus_add_flash_device(&test_chip, &dev_cfg);
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TEST_ESP_OK(err);
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err = esp_flash_init(test_chip);
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TEST_ESP_OK(err);
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}
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void teardown_test_chip(void)
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{
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spi_bus_remove_flash_device(test_chip);
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test_chip = NULL;
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release_bus(TEST_HOST);
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}
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#endif
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static void test_metadata(esp_flash_t *chip)
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{
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ESP_LOGI(TAG, "Testing chip %p...", chip);
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uint32_t id, size;
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TEST_ESP_OK(esp_flash_read_id(chip, &id));
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TEST_ESP_OK(esp_flash_get_size(chip, &size));
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printf("Flash ID %08x detected size %d bytes\n", id, size);
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}
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TEST_CASE("SPI flash metadata functions", "[esp_flash]")
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{
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#ifndef SKIP_EXTENDED_CHIP_TEST
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setup_new_chip(TEST_SPI_READ_MODE, TEST_SPI_SPEED);
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test_metadata(test_chip);
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teardown_test_chip();
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#endif
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test_metadata(NULL);
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}
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static uint32_t erase_test_region(esp_flash_t *chip, int num_sectors)
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{
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const esp_partition_t *part = get_test_data_partition();
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uint32_t offs = part->address;
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/* chip should be initialised */
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TEST_ASSERT(esp_flash_default_chip != NULL
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&& esp_flash_chip_driver_initialized(esp_flash_default_chip));
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TEST_ASSERT(num_sectors * 4096 <= part->size);
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bzero(sector_buf, sizeof(sector_buf));
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printf("Erase @ 0x%x...\n", offs);
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TEST_ASSERT_EQUAL_HEX32(ESP_OK, esp_flash_erase_region(chip, offs, num_sectors * 4096) );
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printf("Verify erased...\n");
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for (int i = 0; i < num_sectors; i++) {
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TEST_ASSERT_EQUAL_HEX32(ESP_OK, esp_flash_read(chip, sector_buf, offs + i * 4096, sizeof(sector_buf)));
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printf("Buffer starts 0x%02x 0x%02x 0x%02x 0x%02x\n", sector_buf[0], sector_buf[1], sector_buf[2], sector_buf[3]);
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for (int i = 0; i < sizeof(sector_buf); i++) {
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TEST_ASSERT_EQUAL_HEX8(0xFF, sector_buf[i]);
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}
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}
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return offs;
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}
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void test_simple_read_write(void *chip)
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{
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ESP_LOGI(TAG, "Testing chip %p...", chip);
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uint32_t offs = erase_test_region(chip, 1);
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const int test_seed = 778;
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srand(test_seed);
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for (int i = 0 ; i < sizeof(sector_buf); i++) {
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sector_buf[i] = rand();
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}
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printf("Write %p...\n", (void *)offs);
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_write(chip, sector_buf, offs, sizeof(sector_buf)) );
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bzero(sector_buf, sizeof(sector_buf));
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printf("Read back...\n");
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_read(chip, sector_buf, offs, sizeof(sector_buf)) );
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printf("Buffer starts 0x%02x 0x%02x 0x%02x 0x%02x\n", sector_buf[0], sector_buf[1], sector_buf[2], sector_buf[3]);
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srand(test_seed);
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for (int i = 0; i < sizeof(sector_buf); i++) {
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TEST_ASSERT_EQUAL_HEX8(rand() & 0xFF, sector_buf[i]);
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}
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}
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TEST_CASE("SPI flash simple read/write", "[esp_flash]")
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{
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test_simple_read_write(NULL);
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#ifndef SKIP_EXTENDED_CHIP_TEST
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setup_new_chip(TEST_SPI_READ_MODE, TEST_SPI_SPEED);
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test_simple_read_write(test_chip);
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teardown_test_chip();
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#endif
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}
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void test_unaligned_read_write(void *chip)
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{
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ESP_LOGI(TAG, "Testing chip %p...", chip);
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uint32_t offs = erase_test_region(chip, 2);
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const char *msg = "i am a message";
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TEST_ASSERT(strlen(msg) + 1 % 4 != 0);
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_write(chip, msg, offs + 1, strlen(msg) + 1) );
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char buf[strlen(msg) + 1];
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memset(buf, 0xEE, sizeof(buf));
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_read(chip, buf, offs + 1, strlen(msg) + 1) );
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TEST_ASSERT_EQUAL_STRING_LEN(msg, buf, strlen(msg));
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TEST_ASSERT(memcmp(buf, msg, strlen(msg) + 1) == 0);
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}
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TEST_CASE("SPI flash unaligned read/write", "[esp_flash]")
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{
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#ifndef SKIP_EXTENDED_CHIP_TEST
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setup_new_chip(TEST_SPI_READ_MODE, TEST_SPI_SPEED);
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test_unaligned_read_write(test_chip);
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teardown_test_chip();
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#endif
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test_unaligned_read_write(NULL);
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}
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void test_single_read_write(void *chip)
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{
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ESP_LOGI(TAG, "Testing chip %p...", chip);
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uint32_t offs = erase_test_region(chip, 2);
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for (unsigned v = 0; v < 512; v++) {
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TEST_ASSERT_EQUAL_HEX(ESP_OK, esp_flash_write(chip, &v, offs + v, 1) );
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}
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for (unsigned v = 0; v < 512; v++) {
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uint8_t readback;
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TEST_ASSERT_EQUAL_HEX(ESP_OK, esp_flash_read(chip, &readback, offs + v, 1) );
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TEST_ASSERT_EQUAL_HEX8(v, readback);
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}
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}
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TEST_CASE("SPI flash single byte reads/writes", "[esp_flash]")
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{
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test_single_read_write(NULL);
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#ifndef SKIP_EXTENDED_CHIP_TEST
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setup_new_chip(TEST_SPI_READ_MODE, TEST_SPI_SPEED);
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test_single_read_write(test_chip);
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teardown_test_chip();
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#endif
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}
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/* this test is notable because it generates a lot of unaligned reads/writes,
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and also reads/writes across both a sector boundary & many page boundaries.
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*/
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void test_three_byte_read_write(void *chip)
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{
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ESP_LOGI(TAG, "Testing chip %p...", chip);
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uint32_t offs = erase_test_region(chip, 2);
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ets_printf("offs:%X\n", offs);
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for (uint32_t v = 0; v < 2000; v++) {
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_write(chip, &v, offs + 3 * v, 3) );
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}
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for (uint32_t v = 0; v < 2000; v++) {
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uint32_t readback;
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_read(chip, &readback, offs + 3 * v, 3) );
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TEST_ASSERT_EQUAL_HEX32(v & 0xFFFFFF, readback & 0xFFFFFF);
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}
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}
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TEST_CASE("SPI flash three byte reads/writes", "[esp_flash]")
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{
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#ifndef SKIP_EXTENDED_CHIP_TEST
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setup_new_chip(TEST_SPI_READ_MODE, TEST_SPI_SPEED);
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test_three_byte_read_write(test_chip);
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teardown_test_chip();
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#endif
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test_three_byte_read_write(NULL);
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}
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void test_erase_large_region(esp_flash_t *chip)
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{
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ESP_LOGI(TAG, "Testing chip %p...", chip);
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const esp_partition_t *part = get_test_data_partition();
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/* Write some noise at the start and the end of the region */
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const char *ohai = "OHAI";
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uint32_t readback;
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_write(chip, ohai, part->address, 5));
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_write(chip, ohai, part->address + part->size - 5, 5));
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/* sanity check what we just wrote. since the partition may haven't been erased, we only check the part which is written to 0. */
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uint32_t written_data = *((const uint32_t *)ohai);
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_read(chip, &readback, part->address + part->size - 5, 4));
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TEST_ASSERT_EQUAL_HEX32(0, readback & (~written_data));
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_read(chip, &readback, part->address, 4));
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TEST_ASSERT_EQUAL_HEX32(0, readback & (~written_data));
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/* Erase whole region */
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_erase_region(chip, part->address, part->size));
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/* ensure both areas we wrote are now all-FFs */
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_read(chip, &readback, part->address, 4));
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TEST_ASSERT_EQUAL_HEX32(0xFFFFFFFF, readback);
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TEST_ASSERT_EQUAL(ESP_OK, esp_flash_read(chip, &readback, part->address + part->size - 5, 4));
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TEST_ASSERT_EQUAL_HEX32(0xFFFFFFFF, readback);
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}
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TEST_CASE("SPI flash erase large region", "[esp_flash]")
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{
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test_erase_large_region(NULL);
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#ifndef SKIP_EXTENDED_CHIP_TEST
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setup_new_chip(TEST_SPI_READ_MODE, TEST_SPI_SPEED);
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test_erase_large_region(test_chip);
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teardown_test_chip();
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#endif
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}
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static void test_write_protection(esp_flash_t* chip)
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{
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bool wp = true;
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esp_err_t ret = ESP_OK;
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ret = esp_flash_get_chip_write_protect(chip, &wp);
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TEST_ESP_OK(ret);
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for (int i = 0; i < 4; i ++) {
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bool wp_write = !wp;
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ret = esp_flash_set_chip_write_protect(chip, wp_write);
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TEST_ESP_OK(ret);
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bool wp_read;
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ret = esp_flash_get_chip_write_protect(chip, &wp_read);
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TEST_ESP_OK(ret);
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TEST_ASSERT(wp_read == wp_write);
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wp = wp_read;
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}
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}
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TEST_CASE("Test esp_flash can enable/disable write protetion", "[esp_flash]")
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{
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test_write_protection(NULL);
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#ifndef SKIP_EXTENDED_CHIP_TEST
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setup_new_chip(TEST_SPI_READ_MODE, TEST_SPI_SPEED);
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test_write_protection(test_chip);
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teardown_test_chip();
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#endif
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}
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static const uint8_t large_const_buffer[16400] = {
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203, // first byte
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1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
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21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
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[50 ... 99] = 2,
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[1600 ... 2000] = 3,
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[8000 ... 9000] = 77,
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[15000 ... 16398] = 8,
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43 // last byte
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};
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static void test_write_large_buffer(esp_flash_t *chip, const uint8_t *source, size_t length);
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static void write_large_buffer(esp_flash_t *chip, const esp_partition_t *part, const uint8_t *source, size_t length);
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static void read_and_check(esp_flash_t *chip, const esp_partition_t *part, const uint8_t *source, size_t length);
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TEST_CASE("SPI flash test reading with all speed/mode permutations", "[esp_flash]")
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{
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const int length = sizeof(large_const_buffer);
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uint8_t *source_buf = malloc(length);
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TEST_ASSERT_NOT_NULL(source_buf);
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srand(778);
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for (int i = 0; i < length; i++) {
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source_buf[i] = rand();
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}
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const esp_partition_t *part = get_test_data_partition();
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TEST_ASSERT(part->size > length + 2 + SPI_FLASH_SEC_SIZE);
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#ifndef SKIP_EXTENDED_CHIP_TEST
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//use the lowest speed to write and read to make sure success
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setup_new_chip(TEST_SPI_READ_MODE, ESP_FLASH_SPEED_MIN);
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write_large_buffer(test_chip, part, source_buf, length);
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read_and_check(test_chip, part, source_buf, length);
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teardown_test_chip();
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esp_flash_read_mode_t io_mode = SPI_FLASH_READ_MODE_MIN;
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while (io_mode != SPI_FLASH_READ_MODE_MAX) {
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esp_flash_speed_t speed = ESP_FLASH_SPEED_MIN;
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while (speed != ESP_FLASH_SPEED_MAX) {
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ESP_LOGI(TAG, "test flash io mode: %d, speed: %d", io_mode, speed);
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setup_new_chip(io_mode, speed);
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read_and_check(test_chip, part, source_buf, length);
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teardown_test_chip();
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speed++;
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}
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io_mode++;
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}
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#endif
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//test main flash BTW
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write_large_buffer(NULL, part, source_buf, length);
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read_and_check(NULL, part, source_buf, length);
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|
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free(source_buf);
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}
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|
|
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TEST_CASE("Test esp_flash_write large const buffer", "[esp_flash]")
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{
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|
//buffer in flash
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|
test_write_large_buffer(NULL, large_const_buffer, sizeof(large_const_buffer));
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|
#ifndef SKIP_EXTENDED_CHIP_TEST
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|
setup_new_chip(TEST_SPI_READ_MODE, TEST_SPI_SPEED);
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test_write_large_buffer(test_chip, large_const_buffer, sizeof(large_const_buffer));
|
|
teardown_test_chip();
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|
#endif
|
|
}
|
|
|
|
#ifndef SKIP_EXTENDED_CHIP_TEST
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|
TEST_CASE("Test esp_flash_write large RAM buffer", "[esp_flash]")
|
|
{
|
|
// buffer in RAM
|
|
uint8_t *source_buf = malloc(sizeof(large_const_buffer));
|
|
TEST_ASSERT_NOT_NULL(source_buf);
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|
memcpy(source_buf, large_const_buffer, sizeof(large_const_buffer));
|
|
|
|
setup_new_chip(TEST_SPI_READ_MODE, TEST_SPI_SPEED);
|
|
test_write_large_buffer(test_chip, source_buf, sizeof(large_const_buffer));
|
|
teardown_test_chip();
|
|
|
|
free(source_buf);
|
|
}
|
|
#endif
|
|
|
|
static void write_large_buffer(esp_flash_t *chip, const esp_partition_t *part, const uint8_t *source, size_t length)
|
|
{
|
|
printf("Writing chip %p, %d bytes from source %p\n", chip, length, source);
|
|
|
|
ESP_ERROR_CHECK( esp_flash_erase_region(chip, part->address, (length + SPI_FLASH_SEC_SIZE) & ~(SPI_FLASH_SEC_SIZE - 1)) );
|
|
|
|
// note writing to unaligned address
|
|
ESP_ERROR_CHECK( esp_flash_write(chip, source, part->address + 1, length) );
|
|
}
|
|
|
|
static void read_and_check(esp_flash_t *chip, const esp_partition_t *part, const uint8_t *source, size_t length)
|
|
{
|
|
printf("Checking chip %p, %d bytes\n", chip, length);
|
|
uint8_t *buf = malloc(length);
|
|
TEST_ASSERT_NOT_NULL(buf);
|
|
ESP_ERROR_CHECK( esp_flash_read(chip, buf, part->address + 1, length) );
|
|
TEST_ASSERT_EQUAL_HEX8_ARRAY(source, buf, length);
|
|
free(buf);
|
|
|
|
// check nothing was written at beginning or end
|
|
uint8_t ends[8];
|
|
|
|
ESP_ERROR_CHECK( esp_flash_read(chip, ends, part->address, sizeof(ends)) );
|
|
TEST_ASSERT_EQUAL_HEX8(0xFF, ends[0]);
|
|
TEST_ASSERT_EQUAL_HEX8(source[0], ends[1]);
|
|
|
|
ESP_ERROR_CHECK( esp_flash_read(chip, ends, part->address + length, sizeof(ends)) );
|
|
|
|
TEST_ASSERT_EQUAL_HEX8(source[length - 1], ends[0]);
|
|
TEST_ASSERT_EQUAL_HEX8(0xFF, ends[1]);
|
|
TEST_ASSERT_EQUAL_HEX8(0xFF, ends[2]);
|
|
TEST_ASSERT_EQUAL_HEX8(0xFF, ends[3]);
|
|
}
|
|
|
|
static void test_write_large_buffer(esp_flash_t *chip, const uint8_t *source, size_t length)
|
|
{
|
|
ESP_LOGI(TAG, "Testing chip %p...", chip);
|
|
const esp_partition_t *part = get_test_data_partition();
|
|
TEST_ASSERT(part->size > length + 2 + SPI_FLASH_SEC_SIZE);
|
|
|
|
write_large_buffer(chip, part, source, length);
|
|
read_and_check(chip, part, source, length);
|
|
} |