Introduce soc component, add source of rtc_clk and rtc_pm libraries This MR adds parts of the RTC library source code (initialization, clock selection functions, sleep functions). WiFi-related power management functions are kept inside the precompiled library. Most of RTC library APIs have been renamed. Default CPU frequency option in Kconfig is set to 160MHz, pending qualification of 240MHz mode at high temperatures. Register header files are moved into the new soc component, which will contain chip-specific header files and low-level non-RTOS-aware APIs (such as rtc_ APIs). Some of the files from ESP32 component were also moved: cpu_util.c, brownout.c, and the corresponding header files. Further refactoring of ESP32 component into more meaningful layers (chip-specific low level functions; chip-specific RTOS aware functions; framework-specific RTOS-related functions) will be done in future MRs. See merge request !633
209 lines
5.6 KiB
Text
209 lines
5.6 KiB
Text
/* Default entry point: */
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ENTRY(call_start_cpu0);
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SECTIONS
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{
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/* RTC fast memory holds RTC wake stub code,
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including from any source file named rtc_wake_stub*.c
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*/
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.rtc.text :
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{
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. = ALIGN(4);
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*(.rtc.literal .rtc.text)
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*rtc_wake_stub*.o(.literal .text .literal.* .text.*)
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} >rtc_iram_seg
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/* RTC slow memory holds RTC wake stub
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data/rodata, including from any source file
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named rtc_wake_stub*.c
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*/
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.rtc.data :
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{
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_rtc_data_start = ABSOLUTE(.);
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*(.rtc.data)
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*(.rtc.rodata)
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*rtc_wake_stub*.o(.data .rodata .data.* .rodata.* .bss .bss.*)
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_rtc_data_end = ABSOLUTE(.);
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} > rtc_slow_seg
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/* RTC bss, from any source file named rtc_wake_stub*.c */
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.rtc.bss (NOLOAD) :
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{
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_rtc_bss_start = ABSOLUTE(.);
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*rtc_wake_stub*.o(.bss .bss.*)
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*rtc_wake_stub*.o(COMMON)
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_rtc_bss_end = ABSOLUTE(.);
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} > rtc_slow_seg
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/* Send .iram0 code to iram */
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.iram0.vectors :
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{
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/* Vectors go to IRAM */
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_init_start = ABSOLUTE(.);
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/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
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. = 0x0;
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KEEP(*(.WindowVectors.text));
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. = 0x180;
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KEEP(*(.Level2InterruptVector.text));
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. = 0x1c0;
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KEEP(*(.Level3InterruptVector.text));
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. = 0x200;
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KEEP(*(.Level4InterruptVector.text));
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. = 0x240;
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KEEP(*(.Level5InterruptVector.text));
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. = 0x280;
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KEEP(*(.DebugExceptionVector.text));
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. = 0x2c0;
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KEEP(*(.NMIExceptionVector.text));
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. = 0x300;
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KEEP(*(.KernelExceptionVector.text));
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. = 0x340;
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KEEP(*(.UserExceptionVector.text));
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. = 0x3C0;
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KEEP(*(.DoubleExceptionVector.text));
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. = 0x400;
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*(.*Vector.literal)
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*(.UserEnter.literal);
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*(.UserEnter.text);
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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_init_end = ABSOLUTE(.);
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/* This goes here, not at top of linker script, so addr2line finds it last,
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and uses it in preference to the first symbol in IRAM */
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_iram_start = ABSOLUTE(0);
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} > iram0_0_seg
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.iram0.text :
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{
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/* Code marked as runnning out of IRAM */
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_iram_text_start = ABSOLUTE(.);
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*(.iram1 .iram1.*)
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*libfreertos.a:(.literal .text .literal.* .text.*)
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*libesp32.a:panic.o(.literal .text .literal.* .text.*)
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*libesp32.a:core_dump.o(.literal .text .literal.* .text.*)
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*libesp32.a:heap_alloc_caps.o(.literal .text .literal.* .text.*)
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*libphy.a:(.literal .text .literal.* .text.*)
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*librtc.a:(.literal .text .literal.* .text.*)
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*libsoc.a:(.literal .text .literal.* .text.*)
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*libpp.a:pp.o(.literal .text .literal.* .text.*)
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*libpp.a:lmac.o(.literal .text .literal.* .text.*)
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*libpp.a:wdev.o(.literal .text .literal.* .text.*)
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*libcore.a:ets_timer.o(.literal .text .literal.* .text.*)
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*libnet80211.a:ieee80211_misc.o(.literal .text .literal.* .text.*)
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*libhal.a:(.literal .text .literal.* .text.*)
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*libcoexist.a:(.literal .text .literal.* .text.*)
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*libspi_flash.a:spi_flash_rom_patch.o(.literal .text .literal.* .text.*)
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_iram_text_end = ABSOLUTE(.);
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} > iram0_0_seg
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.dram0.data :
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{
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_data_start = ABSOLUTE(.);
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KEEP(*(.data))
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KEEP(*(.data.*))
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KEEP(*(.gnu.linkonce.d.*))
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KEEP(*(.data1))
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KEEP(*(.sdata))
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KEEP(*(.sdata.*))
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KEEP(*(.gnu.linkonce.s.*))
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KEEP(*(.sdata2))
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KEEP(*(.sdata2.*))
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KEEP(*(.gnu.linkonce.s2.*))
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KEEP(*(.jcr))
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*(.dram1 .dram1.*)
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*libesp32.a:panic.o(.rodata .rodata.*)
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_data_end = ABSOLUTE(.);
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. = ALIGN(4);
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} >dram0_0_seg
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/* Shared RAM */
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.dram0.bss (NOLOAD) :
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{
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. = ALIGN (8);
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_bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.share.mem)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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_heap_start = ABSOLUTE(.);
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} >dram0_0_seg
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.flash.rodata :
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{
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_rodata_start = ABSOLUTE(.);
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*(.rodata)
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*(.rodata.*)
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*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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. = (. + 3) & ~ 3;
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/* C++ constructor and destructor tables, properly ordered: */
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__init_array_start = ABSOLUTE(.);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__init_array_end = ABSOLUTE(.);
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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_rodata_end = ABSOLUTE(.);
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/* Literals are also RO data. */
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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. = ALIGN(4);
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} >drom0_0_seg
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.flash.text :
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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_etext = .;
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/* Similar to _iram_start, this symbol goes here so it is
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resolved by addr2line in preference to the first symbol in
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the flash.text segment.
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*/
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_flash_cache_start = ABSOLUTE(0);
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} >iram0_2_seg
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}
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