133 lines
3.8 KiB
C
133 lines
3.8 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// The LL layer for Timer Group register operations.
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// Note that most of the register operations in this layer are non-atomic operations.
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "hal/timer_types.h"
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#include "soc/timer_periph.h"
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/**
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* @brief Get counter vaule from time-base counter
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*
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* @param hw Beginning address of the peripheral registers.
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* @param timer_num The timer number
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* @param timer_val Pointer to accept the counter value
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*
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* @return None
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*/
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static inline void timer_ll_get_counter_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t *timer_val)
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{
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hw->hw_timer[timer_num].update = 1;
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*timer_val = ((uint64_t) hw->hw_timer[timer_num].cnt_high << 32) | (hw->hw_timer[timer_num].cnt_low);
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}
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/**
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* @brief Set counter status, enable or disable counter.
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*
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* @param hw Beginning address of the peripheral registers.
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* @param timer_num The timer number
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* @param counter_en Counter enable status
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*
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* @return None
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*/
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static inline void timer_ll_set_counter_enable(timg_dev_t *hw, timer_idx_t timer_num, timer_start_t counter_en)
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{
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hw->hw_timer[timer_num].config.enable = counter_en;
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}
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/**
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* @brief Get auto reload mode.
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*
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* @param hw Beginning address of the peripheral registers.
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* @param timer_num The timer number
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* @param reload Pointer to accept the auto reload mode
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*
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* @return None
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*/
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static inline bool timer_ll_get_auto_reload(timg_dev_t *hw, timer_idx_t timer_num)
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{
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return hw->hw_timer[timer_num].config.autoreload;
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}
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/**
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* @brief Set the counter value to trigger the alarm.
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*
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* @param hw Beginning address of the peripheral registers.
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* @param timer_num The timer number
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* @param alarm_value Counter value to trigger the alarm
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*
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* @return None
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*/
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static inline void timer_ll_set_alarm_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t alarm_value)
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{
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hw->hw_timer[timer_num].alarm_high = (uint32_t) (alarm_value >> 32);
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hw->hw_timer[timer_num].alarm_low = (uint32_t) alarm_value;
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}
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/**
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* @brief Get the counter value to trigger the alarm.
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*
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* @param hw Beginning address of the peripheral registers.
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* @param timer_num The timer number
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* @param alarm_value Pointer to accept the counter value to trigger the alarm
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*
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* @return None
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*/
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static inline void timer_ll_get_alarm_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t *alarm_value)
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{
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*alarm_value = ((uint64_t) hw->hw_timer[timer_num].alarm_high << 32) | (hw->hw_timer[timer_num].alarm_low);
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}
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/**
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* @brief Set the alarm status, enable or disable the alarm.
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*
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* @param hw Beginning address of the peripheral registers.
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* @param timer_num The timer number
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* @param alarm_en true to enable, false to disable
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*
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* @return None
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*/
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static inline void timer_ll_set_alarm_enable(timg_dev_t *hw, timer_idx_t timer_num, bool alarm_en)
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{
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hw->hw_timer[timer_num].config.alarm_en = alarm_en;
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}
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/**
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* @brief Get the alarm status.
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*
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* @param hw Beginning address of the peripheral registers.
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* @param timer_num The timer number
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* @param alarm_en Pointer to accept the alarm status
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*
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* @return None
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*/
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static inline void timer_ll_get_alarm_enable(timg_dev_t *hw, timer_idx_t timer_num, bool *alarm_en)
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{
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*alarm_en = hw->hw_timer[timer_num].config.alarm_en;
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}
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#ifdef __cplusplus
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}
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#endif
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