Ivan Grokhotkov 75658ee29b bootloader: workaround for clock switching bug in ESP32 rev. 0 ... In ESP32 rev. 0, switching between 240MHz and 80MHz (even via an intermediate frequency of 40MHz) may cause the chip to lock up. The bootloader used to enable 80MHz CPU clock at startup, which could cause lock up after software reset. With this change, if 240MHz CPU clock is enabled in menuconfig, bootloader will also use 240MHz to avoid lock-up.		2017-06-15 18:15:35 +08:00
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bootloader_config.h	secure boot: Fix bootloader image verification failure	2017-04-26 11:23:35 +10:00
bootloader_start.c	bootloader: workaround for clock switching bug in ESP32 rev. 0	2017-06-15 18:15:35 +08:00
component.mk	Merge branch 'feature/rtc_clk_impl' into 'master'	2017-04-12 10:38:23 +08:00
esp32.bootloader.ld	bootloader: update ld script comment	2017-01-06 13:47:53 +08:00
esp32.bootloader.rom.ld	bootloader: export ets_update_cpu_frequency	2017-01-09 03:08:24 +08:00
flash_qio_mode.c	bootloader: Add QIO support for ESP32-D2WD SPI flash	2017-04-13 17:55:47 +10:00
flash_qio_mode.h	Bootloader: Support switching to Quad I/O mode during boot process	2017-02-09 08:44:05 +11:00
Makefile.projbuild	Build system: Fix error if librtc submodule not available to bootloader	2017-02-22 11:59:37 +11:00