af4c455417
* Modify the function implementation of ESP32-S2 RTC GPIO On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register. On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers. * Add ESP32-S2 support of unit test * Modify the pull-up test of unit test * Modify the interrupt test of unit test * Modify input and output mode test of unit test
48 lines
2.1 KiB
C
48 lines
2.1 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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// ESP32 has 1 GPIO peripheral
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#define SOC_GPIO_PORT (1)
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#define GPIO_PIN_COUNT (40)
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// On ESP32 those PADs which have RTC functions must set pullup/down/capability via RTC register.
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// On ESP32-S2, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
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#define GPIO_SUPPORTS_RTC_INDEPENDENT (0)
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// Force hold is a new function of ESP32-S2
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#define GPIO_SUPPORTS_FORCE_HOLD (0)
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#define GPIO_APP_CPU_INTR_ENA (BIT(0))
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#define GPIO_APP_CPU_NMI_INTR_ENA (BIT(1))
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#define GPIO_PRO_CPU_INTR_ENA (BIT(2))
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#define GPIO_PRO_CPU_NMI_INTR_ENA (BIT(3))
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#define GPIO_SDIO_EXT_INTR_ENA (BIT(4))
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#define GPIO_MODE_DEF_DISABLE (0)
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#define GPIO_MODE_DEF_INPUT (BIT0)
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#define GPIO_MODE_DEF_OUTPUT (BIT1)
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#define GPIO_MODE_DEF_OD (BIT2)
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#define GPIO_IS_VALID_GPIO(gpio_num) ((gpio_num < GPIO_PIN_COUNT && GPIO_PIN_MUX_REG[gpio_num] != 0)) /*!< Check whether it is a valid GPIO number */
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#define GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) ((GPIO_IS_VALID_GPIO(gpio_num)) && (gpio_num < 34)) /*!< Check whether it can be a valid GPIO number of output mode */
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#define GPIO_MASK_CONTAIN_INPUT_GPIO(gpio_mask) ((gpio_mask & (GPIO_SEL_34 | GPIO_SEL_35 | GPIO_SEL_36 | GPIO_SEL_37 | GPIO_SEL_38 | GPIO_SEL_39))) /*!< Check whether it contains input io */
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#ifdef __cplusplus
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}
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#endif
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