Darian Leung 0c9e2c0fba esp_adc_cal/Remove lookup table ... This commit removes the lookup table mode due to inferior performance when compared to linear mode under attenuation 0, 1 and 2. However small portions of the lookup table are kept for the higher voltages of atten 3 (above ADC reading 2880). That voltage range in atten 3 has non linear characteristics making the LUT performan better than linear mode.		2018-02-22 20:01:41 +08:00
..
esp32	esp_adc_cal/Remove lookup table	2018-02-22 20:01:41 +08:00
include/soc	Especially when internal memory fills up, some FreeRTOS structures (queues etc) get allocated in psram. These structures also contain a spinlock, which needs an atomic-compare-swap operation to work. The psram hardware, however, does not support this operation. As a workaround, this patch detects these spinlocks and will, instead of S32C1I, use equivalent C-code to simulate the behaviour, with an (internal) mux for atomicity.	2018-02-02 17:11:06 +08:00
test	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
component.mk	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00