Ivan Grokhotkov 964f5a91f7 bootloader, esp32: add workaround for Tensilica erratum 572 ... If zero-overhead loop buffer is enabled, under certain rare conditions when executing a zero-overhead loop, the CPU may attempt to execute an invalid instruction. Work around by disabling the buffer.		2018-11-19 04:39:35 +00:00
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esp32	bootloader, esp32: add workaround for Tensilica erratum 572	2018-11-19 04:39:35 +00:00
include/soc	test: fix the unit test fail issue under single_core config	2018-10-31 17:04:32 +08:00
src	soc: Allow components to reserve fixed memory ranges that they need	2018-08-06 01:37:55 +00:00
test	build system: support for multiple targets	2018-11-11 21:46:02 +08:00
CMakeLists.txt	build system: support for multiple targets	2018-11-11 21:46:02 +08:00
component.mk	build system: support for multiple targets	2018-11-11 21:46:02 +08:00