8d43859b6a
Implements support for system level traces compatible with SEGGER SystemView tool on top of ESP32 application tracing module. That kind of traces can help to analyse program's behaviour. SystemView can show timeline of tasks/ISRs execution, context switches, statistics related to the CPUs' load distribution etc. Also this commit adds useful feature to ESP32 application tracing module: - Trace data buffering is implemented to handle temporary peaks of events load
273 lines
11 KiB
C
273 lines
11 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef __ESP_INTR_ALLOC_H__
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#define __ESP_INTR_ALLOC_H__
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_err.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup Intr_Alloc
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* @{
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*/
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/** @brief Interrupt allocation flags
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*
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* These flags can be used to specify which interrupt qualities the
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* code calling esp_intr_alloc* needs.
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*
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*/
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//Keep the LEVELx values as they are here; they match up with (1<<level)
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#define ESP_INTR_FLAG_LEVEL1 (1<<1) ///< Accept a Level 1 interrupt vector
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#define ESP_INTR_FLAG_LEVEL2 (1<<2) ///< Accept a Level 2 interrupt vector
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#define ESP_INTR_FLAG_LEVEL3 (1<<3) ///< Accept a Level 3 interrupt vector
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#define ESP_INTR_FLAG_LEVEL4 (1<<4) ///< Accept a Level 4 interrupt vector
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#define ESP_INTR_FLAG_LEVEL5 (1<<5) ///< Accept a Level 5 interrupt vector
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#define ESP_INTR_FLAG_LEVEL6 (1<<6) ///< Accept a Level 6 interrupt vector
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#define ESP_INTR_FLAG_NMI (1<<7) ///< Accept a Level 7 interrupt vector
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#define ESP_INTR_FLAG_SHARED (1<<8) ///< Interrupt can be shared between ISRs
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#define ESP_INTR_FLAG_EDGE (1<<9) ///< Edge-triggered interrupt
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#define ESP_INTR_FLAG_IRAM (1<<10) ///< ISR can be called if cache is disabled
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#define ESP_INTR_FLAG_INTRDISABLED (1<<11) ///< Return with this interrupt disabled
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#define ESP_INTR_FLAG_LOWMED (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3) ///< Low and medium prio interrupts. These can be handled in C.
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#define ESP_INTR_FLAG_HIGH (ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6|ESP_INTR_FLAG_NMI) ///< High level interrupts. Need to be handled in assembly.
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#define ESP_INTR_FLAG_LEVELMASK (ESP_INTR_FLAG_LEVEL1|ESP_INTR_FLAG_LEVEL2|ESP_INTR_FLAG_LEVEL3| \
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ESP_INTR_FLAG_LEVEL4|ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_LEVEL6| \
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ESP_INTR_FLAG_NMI) ///< Mask for all level flags
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/**@}*/
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/** @addtogroup Intr_Alloc_Pseudo_Src
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* @{
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*/
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/**
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* The esp_intr_alloc* functions can allocate an int for all ETS_*_INTR_SOURCE interrupt sources that
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* are routed through the interrupt mux. Apart from these sources, each core also has some internal
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* sources that do not pass through the interrupt mux. To allocate an interrupt for these sources,
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* pass these pseudo-sources to the functions.
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*/
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#define ETS_INTERNAL_TIMER0_INTR_SOURCE -1 ///< Xtensa timer 0 interrupt source
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#define ETS_INTERNAL_TIMER1_INTR_SOURCE -2 ///< Xtensa timer 1 interrupt source
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#define ETS_INTERNAL_TIMER2_INTR_SOURCE -3 ///< Xtensa timer 2 interrupt source
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#define ETS_INTERNAL_SW0_INTR_SOURCE -4 ///< Software int source 1
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#define ETS_INTERNAL_SW1_INTR_SOURCE -5 ///< Software int source 2
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#define ETS_INTERNAL_PROFILING_INTR_SOURCE -6 ///< Int source for profiling
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/**@}*/
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// This is used to provide SystemView with positive IRQ IDs, otherwise sheduler events are not shown properly
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#define ETS_INTERNAL_INTR_SOURCE_OFF (-ETS_INTERNAL_PROFILING_INTR_SOURCE)
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typedef void (*intr_handler_t)(void *arg);
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typedef struct intr_handle_data_t intr_handle_data_t;
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typedef intr_handle_data_t* intr_handle_t ;
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/**
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* @brief Mark an interrupt as a shared interrupt
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*
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* This will mark a certain interrupt on the specified CPU as
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* an interrupt that can be used to hook shared interrupt handlers
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* to.
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*
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* @param intno The number of the interrupt (0-31)
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* @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
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* @param is_in_iram Shared interrupt is for handlers that reside in IRAM and
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* the int can be left enabled while the flash cache is disabled.
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*
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* @return ESP_ERR_INVALID_ARG if cpu or intno is invalid
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* ESP_OK otherwise
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*/
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esp_err_t esp_intr_mark_shared(int intno, int cpu, bool is_in_iram);
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/**
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* @brief Reserve an interrupt to be used outside of this framewoek
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*
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* This will mark a certain interrupt on the specified CPU as
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* reserved, not to be allocated for any reason.
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*
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* @param intno The number of the interrupt (0-31)
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* @param cpu CPU on which the interrupt should be marked as shared (0 or 1)
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*
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* @return ESP_ERR_INVALID_ARG if cpu or intno is invalid
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* ESP_OK otherwise
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*/
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esp_err_t esp_intr_reserve(int intno, int cpu);
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/**
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* @brief Allocate an interrupt with the given parameters.
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*
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* This finds an interrupt that matches the restrictions as given in the flags
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* parameter, maps the given interrupt source to it and hooks up the given
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* interrupt handler (with optional argument) as well. If needed, it can return
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* a handle for the interrupt as well.
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*
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* The interrupt will always be allocated on the core that runs this function.
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*
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* If ESP_INTR_FLAG_IRAM flag is used, and handler address is not in IRAM or
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* RTC_FAST_MEM, then ESP_ERR_INVALID_ARG is returned.
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*
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* @param source The interrupt source. One of the ETS_*_INTR_SOURCE interrupt mux
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* sources, as defined in soc/soc.h, or one of the internal
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* ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header.
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* @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the
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* choice of interrupts that this routine can choose from. If this value
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* is 0, it will default to allocating a non-shared interrupt of level
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* 1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
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* interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
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* from this function with the interrupt disabled.
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* @param handler The interrupt handler. Must be NULL when an interrupt of level >3
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* is requested, because these types of interrupts aren't C-callable.
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* @param arg Optional argument for passed to the interrupt handler
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* @param ret_handle Pointer to an intr_handle_t to store a handle that can later be
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* used to request details or free the interrupt. Can be NULL if no handle
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* is required.
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*
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* @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
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* ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
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* ESP_OK otherwise
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*/
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esp_err_t esp_intr_alloc(int source, int flags, intr_handler_t handler, void *arg, intr_handle_t *ret_handle);
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/**
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* @brief Allocate an interrupt with the given parameters.
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*
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*
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* This essentially does the same as esp_intr_alloc, but allows specifying a register and mask
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* combo. For shared interrupts, the handler is only called if a read from the specified
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* register, ANDed with the mask, returns non-zero. By passing an interrupt status register
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* address and a fitting mask, this can be used to accelerate interrupt handling in the case
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* a shared interrupt is triggered; by checking the interrupt statuses first, the code can
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* decide which ISRs can be skipped
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*
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* @param source The interrupt source. One of the ETS_*_INTR_SOURCE interrupt mux
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* sources, as defined in soc/soc.h, or one of the internal
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* ETS_INTERNAL_*_INTR_SOURCE sources as defined in this header.
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* @param flags An ORred mask of the ESP_INTR_FLAG_* defines. These restrict the
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* choice of interrupts that this routine can choose from. If this value
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* is 0, it will default to allocating a non-shared interrupt of level
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* 1, 2 or 3. If this is ESP_INTR_FLAG_SHARED, it will allocate a shared
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* interrupt of level 1. Setting ESP_INTR_FLAG_INTRDISABLED will return
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* from this function with the interrupt disabled.
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* @param intrstatusreg The address of an interrupt status register
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* @param intrstatusmask A mask. If a read of address intrstatusreg has any of the bits
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* that are 1 in the mask set, the ISR will be called. If not, it will be
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* skipped.
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* @param handler The interrupt handler. Must be NULL when an interrupt of level >3
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* is requested, because these types of interrupts aren't C-callable.
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* @param arg Optional argument for passed to the interrupt handler
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* @param ret_handle Pointer to an intr_handle_t to store a handle that can later be
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* used to request details or free the interrupt. Can be NULL if no handle
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* is required.
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*
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* @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
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* ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
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* ESP_OK otherwise
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*/
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esp_err_t esp_intr_alloc_intrstatus(int source, int flags, uint32_t intrstatusreg, uint32_t intrstatusmask, intr_handler_t handler, void *arg, intr_handle_t *ret_handle);
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/**
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* @brief Disable and free an interrupt.
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*
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* Use an interrupt handle to disable the interrupt and release the resources
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* associated with it.
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*
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* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
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*
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* @return ESP_ERR_INVALID_ARG if handle is invalid, or esp_intr_free runs on another core than
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* where the interrupt is allocated on.
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* ESP_OK otherwise
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*/
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esp_err_t esp_intr_free(intr_handle_t handle);
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/**
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* @brief Get CPU number an interrupt is tied to
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*
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* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
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*
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* @return The core number where the interrupt is allocated
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*/
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int esp_intr_get_cpu(intr_handle_t handle);
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/**
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* @brief Get the allocated interrupt for a certain handle
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*
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* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
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*
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* @return The interrupt number
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*/
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int esp_intr_get_intno(intr_handle_t handle);
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/**
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* @brief Disable the interrupt associated with the handle
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*
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* @note For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the
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* CPU the interrupt is allocated on. Other interrupts have no such restriction.
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*
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* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
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*
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* @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
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* ESP_OK otherwise
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*/
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esp_err_t esp_intr_disable(intr_handle_t handle);
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/**
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* @brief Ensable the interrupt associated with the handle
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*
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* @note For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the
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* CPU the interrupt is allocated on. Other interrupts have no such restriction.
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*
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* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
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*
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* @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
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* ESP_OK otherwise
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*/
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esp_err_t esp_intr_enable(intr_handle_t handle);
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/**
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* @brief Disable interrupts that aren't specifically marked as running from IRAM
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*/
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void esp_intr_noniram_disable();
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/**
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* @brief Re-enable interrupts disabled by esp_intr_noniram_disable
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*/
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void esp_intr_noniram_enable();
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/**@}*/
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#ifdef __cplusplus
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}
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#endif
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#endif
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