8d43859b6a
Implements support for system level traces compatible with SEGGER SystemView tool on top of ESP32 application tracing module. That kind of traces can help to analyse program's behaviour. SystemView can show timeline of tasks/ISRs execution, context switches, statistics related to the CPUs' load distribution etc. Also this commit adds useful feature to ESP32 application tracing module: - Trace data buffering is implemented to handle temporary peaks of events load
299 lines
18 KiB
C
299 lines
18 KiB
C
/*********************************************************************
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* SEGGER Microcontroller GmbH & Co. KG *
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* The Embedded Experts *
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**********************************************************************
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* *
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* (c) 2015 - 2017 SEGGER Microcontroller GmbH & Co. KG *
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* *
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* www.segger.com Support: support@segger.com *
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* *
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**********************************************************************
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* *
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* SEGGER SystemView * Real-time application analysis *
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* *
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**********************************************************************
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* *
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* All rights reserved. *
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* *
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* SEGGER strongly recommends to not make any changes *
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* to or modify the source code of this software in order to stay *
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* compatible with the RTT protocol and J-Link. *
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* *
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* Redistribution and use in source and binary forms, with or *
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* without modification, are permitted provided that the following *
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* conditions are met: *
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* *
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* o Redistributions of source code must retain the above copyright *
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* notice, this list of conditions and the following disclaimer. *
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* *
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* o Redistributions in binary form must reproduce the above *
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* copyright notice, this list of conditions and the following *
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* disclaimer in the documentation and/or other materials provided *
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* with the distribution. *
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* *
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* o Neither the name of SEGGER Microcontroller GmbH & Co. KG *
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* nor the names of its contributors may be used to endorse or *
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* promote products derived from this software without specific *
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* prior written permission. *
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* *
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
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* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
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* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
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* DAMAGE. *
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* *
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**********************************************************************
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* *
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* SystemView version: V2.42 *
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* *
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**********************************************************************
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---------------------------END-OF-HEADER------------------------------
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File : SEGGER_RTT_Conf.h
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Purpose : Implementation of SEGGER real-time transfer (RTT) which
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allows real-time communication on targets which support
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debugger memory accesses while the CPU is running.
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Revision: $Rev: 5626 $
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*/
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#ifndef SEGGER_RTT_CONF_H
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#define SEGGER_RTT_CONF_H
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#ifdef __IAR_SYSTEMS_ICC__
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#include <intrinsics.h>
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#endif
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/*********************************************************************
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*
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* Defines, configurable
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*
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**********************************************************************
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*/
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#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
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#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
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#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
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#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
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#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
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#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
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//
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// Target is not allowed to perform other RTT operations while string still has not been stored completely.
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// Otherwise we would probably end up with a mixed string in the buffer.
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// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
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//
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// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
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// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
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// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
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// (Higher priority = lower priority number)
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// Default value for embOS: 128u
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// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
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// or define SEGGER_RTT_LOCK() to completely disable interrupts.
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//
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
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/*********************************************************************
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*
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* RTT lock configuration for SEGGER Embedded Studio,
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* Rowley CrossStudio and GCC
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*/
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#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)
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#ifdef __ARM_ARCH_6M__
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#define SEGGER_RTT_LOCK() { \
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unsigned int LockState; \
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__asm volatile ("mrs %0, primask \n\t" \
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"mov r1, $1 \n\t" \
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"msr primask, r1 \n\t" \
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: "=r" (LockState) \
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: \
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: "r1" \
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);
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#define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
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: \
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: "r" (LockState) \
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: \
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); \
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}
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#elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__))
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#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
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#endif
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#define SEGGER_RTT_LOCK() { \
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unsigned int LockState; \
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__asm volatile ("mrs %0, basepri \n\t" \
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"mov r1, %1 \n\t" \
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"msr basepri, r1 \n\t" \
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: "=r" (LockState) \
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: "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
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: "r1" \
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);
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#define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
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: \
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: "r" (LockState) \
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: \
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); \
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}
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#elif defined(__ARM_ARCH_7A__)
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#define SEGGER_RTT_LOCK() { \
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unsigned int LockState; \
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__asm volatile ("mrs r1, CPSR \n\t" \
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"mov %0, r1 \n\t" \
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"orr r1, r1, #0xC0 \n\t" \
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"msr CPSR_c, r1 \n\t" \
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: "=r" (LockState) \
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: \
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: "r1" \
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);
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#define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
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"mrs r1, CPSR \n\t" \
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"bic r1, r1, #0xC0 \n\t" \
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"and r0, r0, #0xC0 \n\t" \
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"orr r1, r1, r0 \n\t" \
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"msr CPSR_c, r1 \n\t" \
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: \
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: "r" (LockState) \
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: "r0", "r1" \
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); \
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}
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#else
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#define SEGGER_RTT_LOCK()
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#define SEGGER_RTT_UNLOCK()
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#endif
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for IAR EWARM
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*/
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#ifdef __ICCARM__
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#if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
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#define SEGGER_RTT_LOCK() { \
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unsigned int LockState; \
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LockState = __get_PRIMASK(); \
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__set_PRIMASK(1);
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#define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
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}
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#elif ((defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || (defined (__ARM7M__) && (__CORE__ == __ARM7M__)))
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#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
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#endif
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#define SEGGER_RTT_LOCK() { \
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unsigned int LockState; \
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LockState = __get_BASEPRI(); \
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__set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
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#define SEGGER_RTT_UNLOCK() __set_BASEPRI(LockState); \
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}
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#endif
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for IAR RX
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*/
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#ifdef __ICCRX__
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#define SEGGER_RTT_LOCK() { \
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unsigned long LockState; \
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LockState = __get_interrupt_state(); \
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__disable_interrupt();
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#define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \
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}
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for KEIL ARM
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*/
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#ifdef __CC_ARM
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#if (defined __TARGET_ARCH_6S_M)
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#define SEGGER_RTT_LOCK() { \
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unsigned int LockState; \
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register unsigned char PRIMASK __asm( "primask"); \
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LockState = PRIMASK; \
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PRIMASK = 1u; \
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__schedule_barrier();
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#define SEGGER_RTT_UNLOCK() PRIMASK = LockState; \
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__schedule_barrier(); \
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}
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#elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
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#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
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#endif
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#define SEGGER_RTT_LOCK() { \
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unsigned int LockState; \
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register unsigned char BASEPRI __asm( "basepri"); \
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LockState = BASEPRI; \
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BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
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__schedule_barrier();
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#define SEGGER_RTT_UNLOCK() BASEPRI = LockState; \
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__schedule_barrier(); \
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}
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#endif
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#endif
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/*********************************************************************
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*
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* RTT lock configuration for TI ARM
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*/
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#ifdef __TI_ARM__
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#if defined (__TI_ARM_V6M0__)
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#define SEGGER_RTT_LOCK() { \
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unsigned int LockState; \
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LockState = __get_PRIMASK(); \
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__set_PRIMASK(1);
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#define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
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}
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#elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
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#ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
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#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
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#endif
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#define SEGGER_RTT_LOCK() { \
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unsigned int LockState; \
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LockState = OS_GetBASEPRI(); \
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OS_SetBASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
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#define SEGGER_RTT_UNLOCK() OS_SetBASEPRI(LockState); \
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}
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#endif
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#endif
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/*********************************************************************
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*
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* RTT lock configuration fallback
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*/
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#ifndef SEGGER_RTT_LOCK
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void SEGGER_SYSVIEW_X_RTT_Lock();
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#define SEGGER_RTT_LOCK() SEGGER_SYSVIEW_X_RTT_Lock() // Lock RTT (nestable) (i.e. disable interrupts)
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#endif
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#ifndef SEGGER_RTT_UNLOCK
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void SEGGER_SYSVIEW_X_RTT_Unlock();
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#define SEGGER_RTT_UNLOCK() SEGGER_SYSVIEW_X_RTT_Unlock() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
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#endif
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#endif
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/*************************** End of file ****************************/
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