253 lines
8.2 KiB
C
253 lines
8.2 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// The HAL layer for I2S (common part)
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#include "soc/soc.h"
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#include "esp_log.h"
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#include "hal/i2s_hal.h"
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void i2s_hal_reset_fifo(i2s_hal_context_t *hal)
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{
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i2s_ll_reset_rx_fifo(hal->dev);
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i2s_ll_reset_tx_fifo(hal->dev);
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}
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void i2s_hal_set_tx_mode(i2s_hal_context_t *hal, i2s_channel_t ch, i2s_bits_per_sample_t bits)
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{
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if (bits <= I2S_BITS_PER_SAMPLE_16BIT) {
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i2s_ll_set_tx_fifo_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
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} else {
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i2s_ll_set_tx_fifo_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 2 : 3);
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}
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i2s_ll_set_tx_chan_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
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#if SOC_I2S_SUPPORTS_DMA_EQUAL
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i2s_ll_set_tx_dma_equal(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
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#endif
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}
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void i2s_hal_set_rx_mode(i2s_hal_context_t *hal, i2s_channel_t ch, i2s_bits_per_sample_t bits)
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{
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if (bits <= I2S_BITS_PER_SAMPLE_16BIT) {
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i2s_ll_set_rx_fifo_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
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} else {
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i2s_ll_set_rx_fifo_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 2 : 3);
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}
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i2s_ll_set_rx_chan_mod(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
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#if SOC_I2S_SUPPORTS_DMA_EQUAL
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i2s_ll_set_rx_dma_equal(hal->dev, (ch == I2S_CHANNEL_STEREO) ? 0 : 1);
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#endif
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}
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void i2s_hal_set_in_link(i2s_hal_context_t *hal, uint32_t bytes_num, uint32_t addr)
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{
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i2s_ll_set_in_link_addr(hal->dev, addr);
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i2s_ll_set_rx_eof_num(hal->dev, bytes_num);
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}
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#if SOC_I2S_SUPPORTS_PDM
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void i2s_hal_get_tx_pdm(i2s_hal_context_t *hal, int *fp, int *fs)
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{
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i2s_ll_get_tx_pdm_fp(hal->dev, (uint32_t *)fp);
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i2s_ll_get_tx_pdm_fs(hal->dev, (uint32_t *)fs);
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}
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#endif
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void i2s_hal_set_clk_div(i2s_hal_context_t *hal, int div_num, int div_a, int div_b, int tx_bck_div, int rx_bck_div)
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{
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i2s_ll_set_clkm_div_num(hal->dev, div_num);
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i2s_ll_set_clkm_div_a(hal->dev, div_a);
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i2s_ll_set_clkm_div_b(hal->dev, div_b);
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i2s_ll_set_tx_bck_div_num(hal->dev, tx_bck_div);
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i2s_ll_set_rx_bck_div_num(hal->dev, rx_bck_div);
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}
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void i2s_hal_set_tx_bits_mod(i2s_hal_context_t *hal, i2s_bits_per_sample_t bits)
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{
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i2s_ll_set_tx_bits_mod(hal->dev, bits);
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}
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void i2s_hal_set_rx_bits_mod(i2s_hal_context_t *hal, i2s_bits_per_sample_t bits)
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{
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i2s_ll_set_rx_bits_mod(hal->dev, bits);
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}
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void i2s_hal_reset(i2s_hal_context_t *hal)
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{
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i2s_ll_reset_dma_in(hal->dev);
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i2s_ll_reset_dma_out(hal->dev);
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i2s_ll_reset_tx(hal->dev);
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i2s_ll_reset_rx(hal->dev);
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}
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void i2s_hal_start_tx(i2s_hal_context_t *hal)
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{
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i2s_ll_start_out_link(hal->dev);
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i2s_ll_start_tx(hal->dev);
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}
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void i2s_hal_start_rx(i2s_hal_context_t *hal)
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{
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i2s_ll_start_in_link(hal->dev);
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i2s_ll_start_rx(hal->dev);
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}
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void i2s_hal_stop_tx(i2s_hal_context_t *hal)
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{
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i2s_ll_stop_out_link(hal->dev);
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i2s_ll_stop_tx(hal->dev);
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}
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void i2s_hal_stop_rx(i2s_hal_context_t *hal)
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{
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i2s_ll_stop_in_link(hal->dev);
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i2s_ll_stop_rx(hal->dev);
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}
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void i2s_hal_config_param(i2s_hal_context_t *hal, const i2s_config_t *i2s_config)
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{
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//reset i2s
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i2s_ll_reset_tx(hal->dev);
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i2s_ll_reset_rx(hal->dev);
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//reset dma
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i2s_ll_reset_dma_in(hal->dev);
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i2s_ll_reset_dma_out(hal->dev);
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i2s_ll_enable_dma(hal->dev);
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i2s_ll_set_lcd_en(hal->dev, 0);
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i2s_ll_set_camera_en(hal->dev, 0);
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#if SOC_I2S_SUPPORTS_PDM
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i2s_ll_set_pcm2pdm_conv_en(hal->dev, 0);
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i2s_ll_set_pdm2pcm_conv_en(hal->dev, 0);
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#endif
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i2s_ll_set_dscr_en(hal->dev, 0);
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i2s_ll_set_tx_chan_mod(hal->dev, i2s_config->channel_format < I2S_CHANNEL_FMT_ONLY_RIGHT ? i2s_config->channel_format : (i2s_config->channel_format >> 1)); // 0-two channel;1-right;2-left;3-righ;4-left
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i2s_ll_set_tx_fifo_mod(hal->dev, i2s_config->channel_format < I2S_CHANNEL_FMT_ONLY_RIGHT ? 0 : 1); // 0-right&left channel;1-one channel
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i2s_ll_set_tx_mono(hal->dev, 0);
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i2s_ll_set_rx_chan_mod(hal->dev, i2s_config->channel_format < I2S_CHANNEL_FMT_ONLY_RIGHT ? i2s_config->channel_format : (i2s_config->channel_format >> 1)); // 0-two channel;1-right;2-left;3-righ;4-left
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i2s_ll_set_rx_fifo_mod(hal->dev, i2s_config->channel_format < I2S_CHANNEL_FMT_ONLY_RIGHT ? 0 : 1); // 0-right&left channel;1-one channel
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i2s_ll_set_rx_mono(hal->dev, 0);
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i2s_ll_set_dscr_en(hal->dev, 1); //connect dma to fifo
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i2s_ll_stop_tx(hal->dev);
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i2s_ll_stop_rx(hal->dev);
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if (i2s_config->mode & I2S_MODE_TX) {
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i2s_ll_set_tx_msb_right(hal->dev, 0);
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i2s_ll_set_tx_right_first(hal->dev, 0);
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i2s_ll_set_tx_slave_mod(hal->dev, 0); // Master
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i2s_ll_set_tx_fifo_mod_force_en(hal->dev, 1);
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if (i2s_config->mode & I2S_MODE_SLAVE) {
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i2s_ll_set_tx_slave_mod(hal->dev, 1); //TX Slave
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}
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}
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if (i2s_config->mode & I2S_MODE_RX) {
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i2s_ll_set_rx_msb_right(hal->dev, 0);
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i2s_ll_set_rx_right_first(hal->dev, 0);
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i2s_ll_set_rx_slave_mod(hal->dev, 0); // Master
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i2s_ll_set_rx_fifo_mod_force_en(hal->dev, 1);
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if (i2s_config->mode & I2S_MODE_SLAVE) {
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i2s_ll_set_rx_slave_mod(hal->dev, 1); //RX Slave
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}
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}
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#if SOC_I2S_SUPPORTS_ADC_DAC
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if (i2s_config->mode & (I2S_MODE_DAC_BUILT_IN | I2S_MODE_ADC_BUILT_IN)) {
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i2s_ll_set_lcd_en(hal->dev, 1);
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i2s_ll_set_tx_right_first(hal->dev, 1);
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i2s_ll_set_camera_en(hal->dev, 0);
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}
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#endif
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#if SOC_I2S_SUPPORTS_PDM
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if (i2s_config->mode & I2S_MODE_PDM) {
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i2s_ll_set_rx_fifo_mod_force_en(hal->dev, 1);
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i2s_ll_set_tx_fifo_mod_force_en(hal->dev, 1);
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i2s_ll_set_tx_pdm_fp(hal->dev, 960);
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i2s_ll_set_tx_pdm_fs(hal->dev, i2s_config->sample_rate / 1000 * 10);
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uint32_t fp, fs;
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i2s_ll_get_tx_pdm_fp(hal->dev, &fp);
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i2s_ll_get_tx_pdm_fs(hal->dev, &fs);
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i2s_ll_set_tx_sinc_osr2(hal->dev, fp / fs);
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i2s_ll_set_rx_sinc_dsr_16_en(hal->dev, 0);
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i2s_ll_set_rx_pdm_en(hal->dev, 1);
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i2s_ll_set_tx_pdm_en(hal->dev, 1);
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i2s_ll_set_pcm2pdm_conv_en(hal->dev, 1);
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i2s_ll_set_pdm2pcm_conv_en(hal->dev, 1);
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} else {
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i2s_ll_set_rx_pdm_en(hal->dev, 0);
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i2s_ll_set_tx_pdm_en(hal->dev, 0);
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}
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#endif
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if (i2s_config->communication_format & I2S_COMM_FORMAT_I2S) {
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i2s_ll_set_tx_short_sync(hal->dev, 0);
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i2s_ll_set_rx_short_sync(hal->dev, 0);
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i2s_ll_set_tx_msb_shift(hal->dev, 1);
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i2s_ll_set_rx_msb_shift(hal->dev, 1);
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if (i2s_config->communication_format & I2S_COMM_FORMAT_I2S_LSB) {
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if (i2s_config->mode & I2S_MODE_TX) {
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i2s_ll_set_tx_msb_shift(hal->dev, 0);
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}
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if (i2s_config->mode & I2S_MODE_RX) {
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i2s_ll_set_rx_msb_shift(hal->dev, 0);
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}
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}
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}
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if (i2s_config->communication_format & I2S_COMM_FORMAT_PCM) {
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i2s_ll_set_tx_msb_shift(hal->dev, 0);
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i2s_ll_set_rx_msb_shift(hal->dev, 0);
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i2s_ll_set_tx_short_sync(hal->dev, 0);
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i2s_ll_set_rx_short_sync(hal->dev, 0);
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if (i2s_config->communication_format & I2S_COMM_FORMAT_PCM_SHORT) {
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if (i2s_config->mode & I2S_MODE_TX) {
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i2s_ll_set_tx_short_sync(hal->dev, 1);
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}
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if (i2s_config->mode & I2S_MODE_RX) {
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i2s_ll_set_rx_short_sync(hal->dev, 1);
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}
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}
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}
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}
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void i2s_hal_enable_master_mode(i2s_hal_context_t *hal)
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{
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i2s_ll_set_tx_slave_mod(hal->dev, 0); //MASTER Slave
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i2s_ll_set_rx_slave_mod(hal->dev, 1); //RX Slave
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}
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void i2s_hal_enable_slave_mode(i2s_hal_context_t *hal)
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{
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i2s_ll_set_tx_slave_mod(hal->dev, 1); //TX Slave
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i2s_ll_set_rx_slave_mod(hal->dev, 1); //RX Slave
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}
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void i2s_hal_init(i2s_hal_context_t *hal, int i2s_num)
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{
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//Get hardware instance.
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hal->dev = I2S_LL_GET_HW(i2s_num);
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}
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