255 lines
8.2 KiB
C
255 lines
8.2 KiB
C
#ifndef _TEST_COMMON_SPI_H_
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#define _TEST_COMMON_SPI_H_
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#include <esp_types.h>
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#include "driver/spi_master.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/ringbuf.h"
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#include "freertos/task.h"
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#include "unity.h"
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#include "test_utils.h"
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#include <string.h>
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#include "param_test.h"
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#include "soc/io_mux_reg.h"
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// All the tests using the header should use this definition as much as possible,
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// so that the working host can be changed easily in the future.
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#if CONFIG_IDF_TARGET_ESP32
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#define TEST_SPI_HOST HSPI_HOST
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#define TEST_SLAVE_HOST VSPI_HOST
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#define PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO
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#define PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI
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#define PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK
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#define PIN_NUM_CS HSPI_IOMUX_PIN_NUM_CS
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#define PIN_NUM_WP HSPI_IOMUX_PIN_NUM_WP
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#define PIN_NUM_HD HSPI_IOMUX_PIN_NUM_HD
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#define SLAVE_PIN_NUM_MISO VSPI_IOMUX_PIN_NUM_MISO
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#define SLAVE_PIN_NUM_MOSI VSPI_IOMUX_PIN_NUM_MOSI
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#define SLAVE_PIN_NUM_CLK VSPI_IOMUX_PIN_NUM_CLK
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#define SLAVE_PIN_NUM_CS VSPI_IOMUX_PIN_NUM_CS
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#define SLAVE_PIN_NUM_WP VSPI_IOMUX_PIN_NUM_WP
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#define SLAVE_PIN_NUM_HD VSPI_IOMUX_PIN_NUM_HD
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#define SLAVE_IOMUX_PIN_MISO VSPI_IOMUX_PIN_NUM_MISO
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#define SLAVE_IOMUX_PIN_MOSI VSPI_IOMUX_PIN_NUM_MOSI
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#define SLAVE_IOMUX_PIN_SCLK VSPI_IOMUX_PIN_NUM_CLK
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#define SLAVE_IOMUX_PIN_CS VSPI_IOMUX_PIN_NUM_CS
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#define MASTER_IOMUX_PIN_MISO HSPI_IOMUX_PIN_NUM_MISO
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#define MASTER_IOMUX_PIN_MOSI HSPI_IOMUX_PIN_NUM_MOSI
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#define MASTER_IOMUX_PIN_SCLK HSPI_IOMUX_PIN_NUM_CLK
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#define MASTER_IOMUX_PIN_CS HSPI_IOMUX_PIN_NUM_CS
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#define UNCONNECTED_PIN 27
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#define INPUT_ONLY_PIN 34
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#define GPIO_DELAY (12.5*2)
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#define ESP_SPI_SLAVE_TV (12.5*3.5)
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#define WIRE_DELAY 12.5
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define TEST_SPI_HOST FSPI_HOST
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#define TEST_SLAVE_HOST HSPI_HOST
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#define PIN_NUM_MISO FSPI_IOMUX_PIN_NUM_MISO
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#define PIN_NUM_MOSI FSPI_IOMUX_PIN_NUM_MOSI
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#define PIN_NUM_CLK FSPI_IOMUX_PIN_NUM_CLK
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#define PIN_NUM_CS FSPI_IOMUX_PIN_NUM_CS
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#define PIN_NUM_WP FSPI_IOMUX_PIN_NUM_WP
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#define PIN_NUM_HD FSPI_IOMUX_PIN_NUM_HD
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#define SLAVE_PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO
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#define SLAVE_PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI
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#define SLAVE_PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK
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#define SLAVE_PIN_NUM_CS HSPI_IOMUX_PIN_NUM_CS
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#define SLAVE_PIN_NUM_WP HSPI_IOMUX_PIN_NUM_WP
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#define SLAVE_PIN_NUM_HD HSPI_IOMUX_PIN_NUM_HD
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#define SLAVE_IOMUX_PIN_MISO -1
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#define SLAVE_IOMUX_PIN_MOSI -1
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#define SLAVE_IOMUX_PIN_SCLK -1
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#define SLAVE_IOMUX_PIN_CS -1
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#define MASTER_IOMUX_PIN_MISO FSPI_IOMUX_PIN_NUM_MISO
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#define MASTER_IOMUX_PIN_MOSI FSPI_IOMUX_PIN_NUM_MOSI
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#define MASTER_IOMUX_PIN_SCLK FSPI_IOMUX_PIN_NUM_CLK
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#define MASTER_IOMUX_PIN_CS FSPI_IOMUX_PIN_NUM_CS
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#define UNCONNECTED_PIN 41
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#define INPUT_ONLY_PIN 46
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#define GPIO_DELAY 0
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#define ESP_SPI_SLAVE_TV 0
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#define WIRE_DELAY 12.5
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#endif
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#define GET_DMA_CHAN(HOST) (HOST)
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#define TEST_DMA_CHAN_MASTER GET_DMA_CHAN(TEST_SPI_HOST)
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#define TEST_DMA_CHAN_SLAVE GET_DMA_CHAN(TEST_SLAVE_HOST)
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#define FUNC_SPI 1
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#define FUNC_GPIO PIN_FUNC_GPIO
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//Delay information
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#define TV_INT_CONNECT_GPIO (ESP_SPI_SLAVE_TV+GPIO_DELAY)
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#define TV_INT_CONNECT (ESP_SPI_SLAVE_TV)
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//when connecting to another board, the delay is usually increased by 12.5ns
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#define TV_WITH_ESP_SLAVE_GPIO (TV_INT_CONNECT_GPIO+WIRE_DELAY)
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#define TV_WITH_ESP_SLAVE (TV_INT_CONNECT+WIRE_DELAY)
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//currently ESP32 slave only supports up to 20MHz, but 40MHz on the same board
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#define ESP_SPI_SLAVE_MAX_FREQ SPI_MASTER_FREQ_20M
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#define ESP_SPI_SLAVE_MAX_FREQ_SYNC SPI_MASTER_FREQ_40M
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#define MAX_TEST_SIZE 16 ///< in this test we run several transactions, this is the maximum trans that can be run
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#define PSET_NAME_LEN 30 ///< length of each param set name
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//test low frequency, high frequency until freq limit for worst case (both GPIO)
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#define TEST_FREQ_DEFAULT(){ \
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1*1000*1000, \
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SPI_MASTER_FREQ_8M , \
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SPI_MASTER_FREQ_9M , \
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SPI_MASTER_FREQ_10M, \
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SPI_MASTER_FREQ_11M, \
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SPI_MASTER_FREQ_13M, \
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SPI_MASTER_FREQ_16M, \
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SPI_MASTER_FREQ_20M, \
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SPI_MASTER_FREQ_26M, \
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SPI_MASTER_FREQ_40M, \
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SPI_MASTER_FREQ_80M, \
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0,\
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}
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//default bus config for tests
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#define SPI_BUS_TEST_DEFAULT_CONFIG() {\
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.miso_io_num=PIN_NUM_MISO, \
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.mosi_io_num=PIN_NUM_MOSI,\
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.sclk_io_num=PIN_NUM_CLK,\
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.quadwp_io_num=-1,\
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.quadhd_io_num=-1\
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}
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//default device config for master devices
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#define SPI_DEVICE_TEST_DEFAULT_CONFIG() {\
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.clock_speed_hz=10*1000*1000,\
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.mode=0,\
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.spics_io_num=PIN_NUM_CS,\
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.queue_size=16,\
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.pre_cb=NULL, \
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.cs_ena_pretrans = 0,\
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.cs_ena_posttrans = 0,\
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.input_delay_ns = 62.5,\
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}
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//default device config for slave devices
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#define SPI_SLAVE_TEST_DEFAULT_CONFIG() {\
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.mode=0,\
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.spics_io_num=PIN_NUM_CS,\
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.queue_size=3,\
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.flags=0,\
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}
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typedef enum {
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FULL_DUPLEX = 0,
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HALF_DUPLEX_MISO = 1,
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HALF_DUPLEX_MOSI = 2,
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} spi_dup_t;
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/*-------- slave task related stuff -----------*/
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typedef struct {
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uint32_t len;
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uint8_t* tx_start;
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uint8_t data[1];
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} slave_rxdata_t;
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typedef struct {
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uint32_t len;
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const uint8_t *start;
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} slave_txdata_t;
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typedef struct {
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spi_host_device_t spi;
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RingbufHandle_t data_received;
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QueueHandle_t data_to_send;
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} spi_slave_task_context_t;
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// test data for master and slave
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extern uint8_t spitest_master_send[];
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extern uint8_t spitest_slave_send[];
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//tags for master and slave app
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extern const char MASTER_TAG[];
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extern const char SLAVE_TAG[];
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//parameter set definition
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typedef struct {
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const char pset_name[PSET_NAME_LEN];
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/*The test work till the frequency below,
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*set the frequency to higher and remove checks in the driver to know how fast the system can run.
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*/
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const int *freq_list; // list of tested frequency, terminated by 0
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int freq_limit; //freq larger (not equal) than this will be ignored
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spi_dup_t dup;
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int mode;
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bool length_aligned;
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int test_size;
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int master_limit; // the master disable dummy bits and discard readings over this freq
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bool master_iomux;
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int master_dma_chan;
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bool slave_iomux;
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int slave_dma_chan;
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int slave_tv_ns;
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bool slave_unaligned_addr;
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} spitest_param_set_t;
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//context definition for the parameterized test
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typedef struct {
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uint8_t master_rxbuf[480];
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spi_transaction_t master_trans[MAX_TEST_SIZE];
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TaskHandle_t handle_slave;
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spi_slave_task_context_t slave_context;
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slave_txdata_t slave_trans[MAX_TEST_SIZE];
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} spitest_context_t;
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// fill default value of spitest_param_set_t
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void spitest_def_param(void* arg);
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// functions for slave task
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esp_err_t init_slave_context(spi_slave_task_context_t *context);
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void deinit_slave_context(spi_slave_task_context_t *context);
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void spitest_slave_task(void* arg);
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//called by slave, pull-up all pins used by slave
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void slave_pull_up(const spi_bus_config_t* cfg, int spics_io_num);
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// to access data of pre-defined transactions.
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void spitest_init_transactions(const spitest_param_set_t *cfg, spitest_context_t* context);
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// print data from a transaction
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void spitest_master_print_data(spi_transaction_t *t, int rxlength);
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void spitest_slave_print_data(slave_rxdata_t *t, bool print_rxdata);
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// Check whether master and slave data match
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esp_err_t spitest_check_data(int len, spi_transaction_t *master_t, slave_rxdata_t *slave_t, bool check_master_data, bool check_slave_len, bool check_slave_data);
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static inline int get_trans_len(spi_dup_t dup, spi_transaction_t *master_t)
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{
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if (dup!=HALF_DUPLEX_MISO) {
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return master_t->length;
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} else {
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return master_t->rxlength;
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}
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}
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//remove device from bus and free the bus
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void master_free_device_bus(spi_device_handle_t spi);
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//use this function to fix the output source when assign multiple funcitons to a same pin
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void spitest_gpio_output_sel(uint32_t gpio_num, int func, uint32_t signal_idx);
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#endif //_TEST_COMMON_SPI_H_
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