334 lines
12 KiB
C
334 lines
12 KiB
C
/**
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* I2S test environment UT_T1_I2S:
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* connect GPIO18 and GPIO19, GPIO25 and GPIO26, GPIO21 and GPIO22
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*/
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#include <stdio.h>
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#include <string.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "driver/i2s.h"
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#include "unity.h"
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#include "math.h"
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#define SAMPLE_RATE (36000)
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#define SAMPLE_BITS (16)
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#define MASTER_BCK_IO 18
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#define SLAVE_BCK_IO 19
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#define SLAVE_WS_IO 26
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#define DATA_IN_IO 21
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#if CONFIG_IDF_TARGET_ESP32
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#define MASTER_WS_IO 25
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#define DATA_OUT_IO 22
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#elif CONFIG_IDF_TARGET_ESP32S2BETA
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#define MASTER_WS_IO 28
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#define DATA_OUT_IO 20
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#endif
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#define PERCENT_DIFF 0.0001
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/**
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* i2s initialize test
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* 1. i2s_driver_install
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* 2. i2s_set_pin
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*/
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TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
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{
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// dac, adc i2s
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i2s_config_t i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_TX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
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.dma_buf_count = 6,
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.dma_buf_len = 60,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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//install and start i2s driver
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
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//for internal DAC, this will enable both of the internal channels
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
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//stop & destroy i2s driver
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TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
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// normal i2s
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i2s_pin_config_t pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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.ws_io_num = MASTER_WS_IO,
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.data_out_num = DATA_OUT_IO,
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.data_in_num = -1
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};
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
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TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
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//error param test
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TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
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TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG);
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i2s_config.dma_buf_count = 1;
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TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
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i2s_config.dma_buf_count = 129;
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TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
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TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
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}
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#if CONFIG_IDF_TARGET_ESP32
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/* ESP32S2BETA has only single I2S port and hence following test cases are not applicable */
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TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s][test_env=UT_T1_I2S]")
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{
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// master driver installed and send data
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i2s_config_t master_i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_TX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t master_pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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.ws_io_num = MASTER_WS_IO,
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.data_out_num = DATA_OUT_IO,
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.data_in_num = -1
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};
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
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printf("\r\nheap size: %d\n", esp_get_free_heap_size());
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i2s_config_t slave_i2s_config = {
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.mode = I2S_MODE_SLAVE | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t slave_pin_config = {
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.bck_io_num = SLAVE_BCK_IO,
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.ws_io_num = SLAVE_WS_IO,
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.data_out_num = -1,
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.data_in_num = DATA_IN_IO,
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};
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// slave driver installed and receive data
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
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printf("\r\nheap size: %d\n", esp_get_free_heap_size());
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uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
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size_t i2s_bytes_write = 0;
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size_t bytes_read = 0;
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int length = 0;
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uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000);
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for(int i=0; i<100; i++) {
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data_wr[i] = i+1;
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}
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int flag=0; // break loop flag
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int end_position = 0;
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// write data to slave
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i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
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while(!flag){
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i2s_read(I2S_NUM_1, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
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if(bytes_read>0) {
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printf("read data size: %d\n", bytes_read);
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for(int i=length; i<length + bytes_read; i++) {
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if(i2s_read_buff[i] == 100) {
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flag=1;
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end_position = i;
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break;
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}
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}
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}
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length = length + bytes_read;
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}
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// test the readed data right or not
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for(int i=end_position-99; i<=end_position; i++) {
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TEST_ASSERT(*(i2s_read_buff + i) == (i-end_position+100));
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}
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free(data_wr);
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free(i2s_read_buff);
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i2s_driver_uninstall(I2S_NUM_0);
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i2s_driver_uninstall(I2S_NUM_1);
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}
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TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s][test_env=UT_T1_I2S]")
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{
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// master driver installed and send data
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i2s_config_t master_i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t master_pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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.ws_io_num = MASTER_WS_IO,
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.data_out_num = -1,
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.data_in_num = DATA_IN_IO,
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};
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
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printf("\r\nheap size: %d\n", esp_get_free_heap_size());
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i2s_config_t slave_i2s_config = {
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.mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only RX
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
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.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t slave_pin_config = {
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.bck_io_num = SLAVE_BCK_IO,
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.ws_io_num = SLAVE_WS_IO,
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.data_out_num = DATA_OUT_IO,
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.data_in_num = -1
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};
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// slave driver installed and receive data
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
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uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
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size_t i2s_bytes_write = 0;
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size_t bytes_read = 0;
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int length = 0;
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uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*100000);
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for(int i=0; i<100; i++) {
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data_wr[i] = i+1;
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}
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// slave write data to master
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i2s_write(I2S_NUM_1, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
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int flag=0; // break loop flag
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int end_position = 0;
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// write data to slave
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while(!flag){
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TEST_ESP_OK(i2s_read(I2S_NUM_0, i2s_read_buff + length, 10000-length, &bytes_read, 1000/portMAX_DELAY));
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if(bytes_read > 0) {
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for(int i=length; i<length+bytes_read; i++) {
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if(i2s_read_buff[i] == 100) {
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flag=1;
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end_position = i;
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break;
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}
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}
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}
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length = length + bytes_read;
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}
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// test the readed data right or not
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for(int i=end_position-99; i<=end_position; i++) {
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TEST_ASSERT(*(i2s_read_buff + i) == (i-end_position+100));
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}
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free(data_wr);
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free(i2s_read_buff);
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i2s_driver_uninstall(I2S_NUM_0);
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i2s_driver_uninstall(I2S_NUM_1);
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}
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#endif /* CONFIG_IDF_TARGET_ESP32 */
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TEST_CASE("I2S memory leaking test", "[i2s]")
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{
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i2s_config_t master_i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t master_pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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.ws_io_num = MASTER_WS_IO,
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.data_out_num = -1,
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.data_in_num = DATA_IN_IO
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};
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
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i2s_driver_uninstall(I2S_NUM_0);
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int initial_size = esp_get_free_heap_size();
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for(int i=0; i<100; i++) {
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
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i2s_driver_uninstall(I2S_NUM_0);
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TEST_ASSERT(initial_size == esp_get_free_heap_size());
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}
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vTaskDelay(100 / portTICK_PERIOD_MS);
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TEST_ASSERT(initial_size == esp_get_free_heap_size());
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}
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/*
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* The I2S APLL clock variation test used to test the difference between the different sample rates, different bits per sample
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* and the APLL clock generate for it. The TEST_CASE passes PERCENT_DIFF variation from the provided sample rate in APLL generated clock
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* The percentage difference calculated as (mod((obtained clock rate - desired clock rate)/(desired clock rate))) * 100.
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*/
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TEST_CASE("I2S APLL clock variation test", "[i2s]")
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{
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i2s_pin_config_t pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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.ws_io_num = MASTER_WS_IO,
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.data_out_num = DATA_OUT_IO,
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.data_in_num = -1
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};
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i2s_config_t i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_TX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 60,
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.use_apll = true,
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.intr_alloc_flags = 0,
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};
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
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TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
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int initial_size = esp_get_free_heap_size();
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uint32_t sample_rate_arr[8] = { 10675, 11025, 16000, 22050, 32000, 44100, 48000, 96000 };
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int bits_per_sample_arr[3] = { 16, 24, 32 };
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for (int i = 0; i < (sizeof(sample_rate_arr)/sizeof(sample_rate_arr[0])); i++) {
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for (int j = 0; j < (sizeof(bits_per_sample_arr)/sizeof(bits_per_sample_arr[0])); j++) {
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i2s_config.sample_rate = sample_rate_arr[i];
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i2s_config.bits_per_sample = bits_per_sample_arr[j];
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
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TEST_ASSERT((fabs((i2s_get_clk(I2S_NUM_0) - sample_rate_arr[i]))/(sample_rate_arr[i]))*100 < PERCENT_DIFF);
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TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
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TEST_ASSERT(initial_size == esp_get_free_heap_size());
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}
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}
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vTaskDelay(100 / portTICK_PERIOD_MS);
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TEST_ASSERT(initial_size == esp_get_free_heap_size());
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}
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