Configurable option to use IRAM as byte accessible memory (in single core mode) using load-store (non-word aligned and non-word size IRAM access specific) exception handlers. This allows to use IRAM for use-cases where certain performance penalty (upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration option has been provided to redirect mbedTLS specific in-out content length buffers to IRAM (in single core mode), allows to save 20KB per TLS connection.
64 lines
1.7 KiB
CMake
64 lines
1.7 KiB
CMake
if(BOOTLOADER_BUILD)
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# bootloader only needs FreeRTOS for config, not for anything else
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idf_component_register()
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return()
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endif()
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set(srcs
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"xtensa/port.c"
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"xtensa/portasm.S"
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"xtensa/xtensa_context.S"
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"xtensa/xtensa_init.c"
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"xtensa/xtensa_intr_asm.S"
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"xtensa/xtensa_intr.c"
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"xtensa/xtensa_overlay_os_hook.c"
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"xtensa/xtensa_vector_defaults.S"
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"xtensa/xtensa_vectors.S")
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list(APPEND srcs
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"croutine.c"
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"event_groups.c"
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"FreeRTOS-openocd.c"
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"list.c"
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"queue.c"
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"tasks.c"
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"timers.c")
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set(include_dirs
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include
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xtensa/include)
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set(private_include_dirs
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include/freertos
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xtensa/include/freertos
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xtensa
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.)
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if(CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY)
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list(APPEND srcs "xtensa/xtensa_loadstore_handler.S")
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endif()
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# app_trace is required by FreeRTOS headers only when CONFIG_SYSVIEW_ENABLE=y,
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# but requirements can't depend on config options, so always require it.
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idf_component_register(SRCS "${srcs}"
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INCLUDE_DIRS ${include_dirs}
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PRIV_INCLUDE_DIRS ${private_include_dirs}
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LDFRAGMENTS linker.lf
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REQUIRES app_trace esp_timer
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PRIV_REQUIRES soc)
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idf_component_get_property(COMPONENT_DIR freertos COMPONENT_DIR)
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idf_component_set_property(freertos ORIG_INCLUDE_PATH "${COMPONENT_DIR}/include/freertos/")
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if(CONFIG_FREERTOS_DEBUG_OCDAWARE)
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target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--undefined=uxTopUsedPriority")
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endif()
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set_source_files_properties(
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tasks.c
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event_groups.c
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timers.c
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queue.c
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PROPERTIES COMPILE_DEFINITIONS
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_ESP_FREERTOS_INTERNAL
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)
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