fdf983e0c4
The SPI bus lock on SPI1 introduces two side effects:
1. The device lock for the main flash requires the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` to be selected, however this
option is disabled by default in earlier IDF versions. Some developers
may find their project cannot be built by their old sdkconfig files.
2. Usually we don't need the lock on the SPI1 bus, due to it's
restrictions. However the overhead still exists in this case, the IRAM
cost for static version of semaphore functions, and the time cost when
getting and releasing the lock.
This commit:
1. Add a CONFIG_SPI_FLASH_BYPASS_MAIN_LOCK option, which will forbid the
space cost, as well as the initialization of the main bus lock.
2. When the option is not selected, the bus lock is used, the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` will be selected explicitly.
3. Revert default value of `CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION`
to `n`.
introduced in 49a48644e4.
Closes https://github.com/espressif/esp-idf/issues/5046
259 lines
8.7 KiB
C
259 lines
8.7 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "sdkconfig.h"
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#include "esp_flash.h"
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#include "memspi_host_driver.h"
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#include "esp_flash_spi_init.h"
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#include "driver/gpio.h"
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#include "esp32/rom/spi_flash.h"
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#include "esp_log.h"
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#include "esp_heap_caps.h"
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#include "hal/spi_types.h"
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#include "driver/spi_common_internal.h"
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#include "esp_flash_internal.h"
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__attribute__((unused)) static const char TAG[] = "spi_flash";
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#ifdef CONFIG_ESPTOOLPY_FLASHFREQ_80M
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#define DEFAULT_FLASH_SPEED ESP_FLASH_80MHZ
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#elif defined CONFIG_ESPTOOLPY_FLASHFREQ_40M
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#define DEFAULT_FLASH_SPEED ESP_FLASH_40MHZ
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#elif defined CONFIG_ESPTOOLPY_FLASHFREQ_26M
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#define DEFAULT_FLASH_SPEED ESP_FLASH_26MHZ
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#elif defined CONFIG_ESPTOOLPY_FLASHFREQ_20M
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#define DEFAULT_FLASH_SPEED ESP_FLASH_20MHZ
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#else
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#error Flash frequency not defined! Check the ``CONFIG_ESPTOOLPY_FLASHFREQ_*`` options.
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#endif
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#if defined(CONFIG_ESPTOOLPY_FLASHMODE_QIO)
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#define DEFAULT_FLASH_MODE SPI_FLASH_QIO
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#elif defined(CONFIG_ESPTOOLPY_FLASHMODE_QOUT)
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#define DEFAULT_FLASH_MODE SPI_FLASH_QOUT
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#elif defined(CONFIG_ESPTOOLPY_FLASHMODE_DIO)
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#define DEFAULT_FLASH_MODE SPI_FLASH_DIO
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#elif defined(CONFIG_ESPTOOLPY_FLASHMODE_DOUT)
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#define DEFAULT_FLASH_MODE SPI_FLASH_DOUT
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#else
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#define DEFAULT_FLASH_MODE SPI_FLASH_FASTRD
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#endif
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#if CONFIG_IDF_TARGET_ESP32
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#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
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.host_id = SPI_HOST,\
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.speed = DEFAULT_FLASH_SPEED, \
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.cs_num = 0, \
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.iomux = false, \
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.input_delay_ns = 0,\
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}
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/efuse.h"
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#define ESP_FLASH_HOST_CONFIG_DEFAULT() (memspi_host_config_t){ \
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.host_id = SPI_HOST,\
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.speed = DEFAULT_FLASH_SPEED, \
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.cs_num = 0, \
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.iomux = true, \
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.input_delay_ns = 0,\
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}
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#endif
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esp_flash_t *esp_flash_default_chip = NULL;
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static IRAM_ATTR NOINLINE_ATTR void cs_initialize(esp_flash_t *chip, const esp_flash_spi_device_config_t *config, bool use_iomux, int cs_id)
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{
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//Not using spicommon_cs_initialize since we don't want to put the whole
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//spi_periph_signal into the DRAM. Copy these data from flash before the
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//cache disabling
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int cs_io_num = config->cs_io_num;
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int spics_in = spi_periph_signal[config->host_id].spics_in;
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int spics_out = spi_periph_signal[config->host_id].spics_out[cs_id];
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int spics_func = spi_periph_signal[config->host_id].func;
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uint32_t iomux_reg = GPIO_PIN_MUX_REG[cs_io_num];
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//To avoid the panic caused by flash data line conflicts during cs line
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//initialization, disable the cache temporarily
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chip->os_func->start(chip->os_func_data);
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if (use_iomux) {
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// This requires `gpio_iomux_in` and `gpio_iomux_out` to be in the IRAM.
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// `linker.lf` is used fulfill this requirement.
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gpio_iomux_in(cs_io_num, spics_in);
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gpio_iomux_out(cs_io_num, spics_func, false);
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} else {
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PIN_INPUT_ENABLE(iomux_reg);
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if (cs_io_num < 32) {
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GPIO.enable_w1ts = (0x1 << cs_io_num);
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} else {
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GPIO.enable1_w1ts.data = (0x1 << (cs_io_num - 32));
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}
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GPIO.pin[cs_io_num].pad_driver = 0;
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gpio_matrix_out(cs_io_num, spics_out, false, false);
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if (cs_id == 0) {
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gpio_matrix_in(cs_io_num, spics_in, false);
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}
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PIN_FUNC_SELECT(iomux_reg, PIN_FUNC_GPIO);
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}
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chip->os_func->end(chip->os_func_data);
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}
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esp_err_t spi_bus_add_flash_device(esp_flash_t **out_chip, const esp_flash_spi_device_config_t *config)
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{
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if (out_chip == NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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esp_flash_t *chip = NULL;
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spi_flash_host_driver_t *host = NULL;
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memspi_host_data_t *host_data = NULL;
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esp_err_t ret = ESP_OK;
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uint32_t caps = MALLOC_CAP_DEFAULT;
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if (config->host_id == SPI_HOST) caps = MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT;
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chip = (esp_flash_t*)heap_caps_malloc(sizeof(esp_flash_t), caps);
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if (!chip) {
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ret = ESP_ERR_NO_MEM;
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goto fail;
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}
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host = (spi_flash_host_driver_t*)heap_caps_malloc(sizeof(spi_flash_host_driver_t), caps);
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*chip = (esp_flash_t) {
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.read_mode = config->io_mode,
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.host = host,
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};
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if (!host) {
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ret = ESP_ERR_NO_MEM;
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goto fail;
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}
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host_data = (memspi_host_data_t*)heap_caps_malloc(sizeof(memspi_host_data_t), caps);
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host->driver_data = host_data;
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if (!host_data) {
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ret = ESP_ERR_NO_MEM;
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goto fail;
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}
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int dev_id;
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esp_err_t err = esp_flash_init_os_functions(chip, config->host_id, &dev_id);
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if (err == ESP_ERR_NOT_SUPPORTED) {
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ESP_LOGE(TAG, "Init os functions failed! No free CS.");
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} else if (err == ESP_ERR_INVALID_ARG) {
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ESP_LOGE(TAG, "Init os functions failed! Bus lock not initialized (check CONFIG_SPI_FLASH_SHARE_SPI1_BUS).");
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}
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if (err != ESP_OK) {
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ret = err;
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goto fail;
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}
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assert(dev_id < SOC_SPI_PERIPH_CS_NUM(config->host_id) && dev_id >= 0);
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bool use_iomux = spicommon_bus_using_iomux(config->host_id);
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memspi_host_config_t host_cfg = {
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.host_id = config->host_id,
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.cs_num = dev_id,
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.iomux = use_iomux,
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.input_delay_ns = config->input_delay_ns,
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.speed = config->speed,
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};
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err = memspi_host_init_pointers(host, host_data, &host_cfg);
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if (err != ESP_OK) {
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ret = err;
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goto fail;
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}
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// The cs_id inside `config` is deprecated, use the `dev_id` provided by the bus lock instead.
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cs_initialize(chip, config, use_iomux, dev_id);
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*out_chip = chip;
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return ret;
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fail:
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// The memory allocated are free'd in the `spi_bus_remove_flash_device`.
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spi_bus_remove_flash_device(chip);
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return ret;
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}
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esp_err_t spi_bus_remove_flash_device(esp_flash_t *chip)
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{
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if (chip==NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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esp_flash_deinit_os_functions(chip);
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if (chip->host) {
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free(chip->host->driver_data);
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free(chip->host);
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}
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free(chip);
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return ESP_OK;
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}
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/* The default (ie initial boot) no-OS ROM esp_flash_os_functions_t */
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extern const esp_flash_os_functions_t esp_flash_noos_functions;
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#ifndef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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static DRAM_ATTR memspi_host_data_t default_driver_data;
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static DRAM_ATTR spi_flash_host_driver_t esp_flash_default_host_drv = ESP_FLASH_DEFAULT_HOST_DRIVER();
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static DRAM_ATTR esp_flash_t default_chip = {
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.read_mode = DEFAULT_FLASH_MODE,
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.host = &esp_flash_default_host_drv,
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.os_func = &esp_flash_noos_functions,
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};
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esp_err_t esp_flash_init_default_chip(void)
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{
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memspi_host_config_t cfg = ESP_FLASH_HOST_CONFIG_DEFAULT();
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#ifdef CONFIG_IDF_TARGET_ESP32S2
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// For esp32s2 spi IOs are configured as from IO MUX by default
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cfg.iomux = ets_efuse_get_spiconfig() == 0 ? true : false;
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#endif
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//the host is already initialized, only do init for the data and load it to the host
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spi_flash_hal_init(&default_driver_data, &cfg);
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default_chip.host->driver_data = &default_driver_data;
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// ROM TODO: account for non-standard default pins in efuse
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// ROM TODO: to account for chips which are slow to power on, maybe keep probing in a loop here
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esp_err_t err = esp_flash_init(&default_chip);
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if (err != ESP_OK) {
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return err;
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}
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if (default_chip.size < g_rom_flashchip.chip_size) {
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ESP_EARLY_LOGE(TAG, "Detected size(%dk) smaller than the size in the binary image header(%dk). Probe failed.", default_chip.size/1024, g_rom_flashchip.chip_size/1024);
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return ESP_ERR_FLASH_SIZE_NOT_MATCH;
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} else if (default_chip.size > g_rom_flashchip.chip_size) {
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ESP_EARLY_LOGW(TAG, "Detected size(%dk) larger than the size in the binary image header(%dk). Using the size in the binary image header.", default_chip.size/1024, g_rom_flashchip.chip_size/1024);
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default_chip.size = g_rom_flashchip.chip_size;
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}
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default_chip.size = g_rom_flashchip.chip_size;
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esp_flash_default_chip = &default_chip;
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return ESP_OK;
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}
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esp_err_t esp_flash_app_init(void)
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{
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esp_err_t err = ESP_OK;
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#if CONFIG_SPI_FLASH_SHARE_SPI1_BUS
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err = esp_flash_init_main_bus_lock();
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if (err != ESP_OK) return err;
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#endif
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err = esp_flash_app_enable_os_functions(&default_chip);
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return err;
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}
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#endif //!CONFIG_SPI_FLASH_USE_LEGACY_IMPL
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