Ivan Grokhotkov 5a88f90a33 soc/rtc: warn if detected XTAL frequency does not match configured one ... Since 9a8c0392, XTAL frequency is set to 40MHz by default, and users of 26MHz boards need to select 26MHz manually. Most users are not aware of this change, and existing getting started guides do not mention that XTAL frequency needs to be set for some boards. So users are left with garbage output from UART without any clue what to check. This change adds a warning in case specific XTAL frequency was set, and it does not match automatically detected one. This should help users fix the issue.		2017-09-11 11:42:26 +08:00
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include/soc	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00
test	soc: implement XTAL frequency detection	2017-04-24 15:29:30 +08:00
cpu_util.c	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
i2c_apll.h	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
i2c_bbpll.h	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
i2c_rtc_clk.h	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
rtc_clk.c	soc/rtc: warn if detected XTAL frequency does not match configured one	2017-09-11 11:42:26 +08:00
rtc_init.c	soc: fix typo in register name	2017-07-06 12:36:06 +08:00
rtc_pm.c	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
rtc_sleep.c	sleep: add light sleep, factor out APIs common for deep/light sleep	2017-09-01 10:36:14 +08:00
rtc_time.c	Add support for 32k XTAL as RTC_SLOW_CLK source	2017-04-26 12:43:22 +08:00
soc_log.h	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
soc_memory_layout.c	heap: Rename memory "tags" to "types" to avoid confusion w/ old tag allocator API	2017-07-10 17:46:03 +08:00