187 lines
5.1 KiB
C
Executable file
187 lines
5.1 KiB
C
Executable file
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _ROM_UART_H_
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#define _ROM_UART_H_
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#include "esp_types.h"
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#include "esp_attr.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define RX_BUFF_SIZE 0x100
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#define TX_BUFF_SIZE 100
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//uart int enalbe register ctrl bits
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#define UART_RCV_INTEN BIT0
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#define UART_TRX_INTEN BIT1
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#define UART_LINE_STATUS_INTEN BIT2
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//uart int identification ctrl bits
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#define UART_INT_FLAG_MASK 0x0E
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//uart fifo ctrl bits
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#define UART_CLR_RCV_FIFO BIT1
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#define UART_CLR_TRX_FIFO BIT2
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#define UART_RCVFIFO_TRG_LVL_BITS BIT6
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//uart line control bits
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#define UART_DIV_LATCH_ACCESS_BIT BIT7
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//uart line status bits
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#define UART_RCV_DATA_RDY_FLAG BIT0
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#define UART_RCV_OVER_FLOW_FLAG BIT1
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#define UART_RCV_PARITY_ERR_FLAG BIT2
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#define UART_RCV_FRAME_ERR_FLAG BIT3
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#define UART_BRK_INT_FLAG BIT4
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#define UART_TRX_FIFO_EMPTY_FLAG BIT5
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#define UART_TRX_ALL_EMPTY_FLAG BIT6 // include fifo and shift reg
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#define UART_RCV_ERR_FLAG BIT7
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//send and receive message frame head
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#define FRAME_FLAG 0x7E
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typedef enum{
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UART_LINE_STATUS_INT_FLAG = 0x06,
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UART_RCV_FIFO_INT_FLAG = 0x04,
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UART_RCV_TMOUT_INT_FLAG = 0x0C,
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UART_TXBUFF_EMPTY_INT_FLAG = 0x02
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} UartIntType; //consider bit0 for int_flag
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typedef enum {
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RCV_ONE_BYTE = 0x0,
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RCV_FOUR_BYTE = 0x1,
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RCV_EIGHT_BYTE = 0x2,
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RCV_FOURTEEN_BYTE = 0x3
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} UartRcvFifoTrgLvl;
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typedef enum {
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FIVE_BITS = 0x0,
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SIX_BITS = 0x1,
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SEVEN_BITS = 0x2,
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EIGHT_BITS = 0x3
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} UartBitsNum4Char;
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typedef enum {
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ONE_STOP_BIT = 1,
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ONE_HALF_STOP_BIT = 2,
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TWO_STOP_BIT = 3
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} UartStopBitsNum;
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typedef enum {
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NONE_BITS = 0,
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ODD_BITS = 2,
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EVEN_BITS = 3
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} UartParityMode;
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typedef enum {
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STICK_PARITY_DIS = 0,
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STICK_PARITY_EN = 2
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} UartExistParity;
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typedef enum {
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BIT_RATE_9600 = 9600,
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BIT_RATE_19200 = 19200,
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BIT_RATE_38400 = 38400,
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BIT_RATE_57600 = 57600,
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BIT_RATE_115200 = 115200,
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BIT_RATE_230400 = 230400,
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BIT_RATE_460800 = 460800,
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BIT_RATE_921600 = 921600
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} UartBautRate;
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typedef enum {
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NONE_CTRL,
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HARDWARE_CTRL,
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XON_XOFF_CTRL
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} UartFlowCtrl;
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typedef enum {
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EMPTY,
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UNDER_WRITE,
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WRITE_OVER
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} RcvMsgBuffState;
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typedef struct {
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// uint32_t RcvBuffSize;
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uint8_t *pRcvMsgBuff;
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uint8_t *pWritePos;
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uint8_t *pReadPos;
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uint8_t TrigLvl; //JLU: may need to pad
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RcvMsgBuffState BuffState;
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}RcvMsgBuff;
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typedef struct {
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uint32_t TrxBuffSize;
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uint8_t *pTrxBuff;
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} TrxMsgBuff;
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typedef enum {
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BAUD_RATE_DET,
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WAIT_SYNC_FRM,
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SRCH_MSG_HEAD,
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RCV_MSG_BODY,
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RCV_ESC_CHAR,
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} RcvMsgState;
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typedef struct{
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UartBautRate baut_rate;
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UartBitsNum4Char data_bits;
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UartExistParity exist_parity;
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UartParityMode parity; // chip size in byte
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UartStopBitsNum stop_bits;
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UartFlowCtrl flow_ctrl;
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uint8_t buff_uart_no; //indicate which uart use tx/rx buffer
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uint8_t tx_uart_no;
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RcvMsgBuff rcv_buff;
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// TrxMsgBuff trx_buff;
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RcvMsgState rcv_state;
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int received;
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} UartDevice;
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void Uart_Init(uint8_t uart_no, uint32_t clock) ROMFN_ATTR;
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STATUS UartTxString(uint8_t* pString) ROMFN_ATTR;
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STATUS UartRxString(uint8_t* pString, uint8_t MaxStrlen) ROMFN_ATTR;
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STATUS uart_tx_one_char(uint8_t TxChar) ROMFN_ATTR;//for print
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STATUS uart_tx_one_char2(uint8_t TxChar) ROMFN_ATTR;//for send message
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STATUS uart_rx_one_char(uint8_t* pRxChar) ROMFN_ATTR;
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char uart_rx_one_char_block(void) ROMFN_ATTR;
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void uart_rx_intr_handler(void * para) ROMFN_ATTR;
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STATUS uart_rx_readbuff( RcvMsgBuff* pRxBuff, uint8_t* pRxByte) ROMFN_ATTR;
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STATUS UartGetCmdLn(uint8_t * pCmdLn) ROMFN_ATTR;
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UartDevice * GetUartDevice() ROMFN_ATTR;
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void uartToggleInterrupt(bool en) ROMFN_ATTR;
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STATUS SendMsg(uint8_t *pData, uint16_t DataLen) ROMFN_ATTR;
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STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync) ROMFN_ATTR;
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void uartAttach() ROMFN_ATTR;
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void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue) ROMFN_ATTR;
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int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync) ROMFN_ATTR;
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void uart_buff_switch(uint8_t uart_no) ROMFN_ATTR;
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void uart_tx_flush(uint8_t uart_no) ROMFN_ATTR;
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void uart_tx_wait_idle(uint8_t uart_no) ROMFN_ATTR;
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extern UartDevice UartDev;
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ROM_UART_H_ */
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