36 lines
1 KiB
C
36 lines
1 KiB
C
// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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// ESP32 have 2 I2C.
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#define SOC_I2C_NUM (2)
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#define SOC_I2C_FIFO_LEN (32) /*!< I2C hardware FIFO depth */
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#define I2C_INTR_MASK (0x3fff) /*!< I2C all interrupt bitmap */
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//ESP32 do not support hardware FSM reset
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#define I2C_SUPPORT_HW_FSM_RST (0)
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//ESP32 do not support hardware clear bus
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#define I2C_SUPPORT_HW_CLR_BUS (0)
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#ifdef __cplusplus
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}
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#endif
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