235 lines
8.9 KiB
Plaintext
235 lines
8.9 KiB
Plaintext
menu "Common ESP-related"
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config ESP_ERR_TO_NAME_LOOKUP
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bool "Enable lookup of error code strings"
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default "y"
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help
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Functions esp_err_to_name() and esp_err_to_name_r() return string representations of error codes from a
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pre-generated lookup table. This option can be used to turn off the use of the look-up table in order to
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save memory but this comes at the price of sacrificing distinguishable (meaningful) output string
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representations.
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config ESP_SYSTEM_EVENT_QUEUE_SIZE
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int "System event queue size"
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default 32
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help
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Config system event queue size in different application.
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config ESP_SYSTEM_EVENT_TASK_STACK_SIZE
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int "Event loop task stack size"
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default 2304
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help
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Config system event task stack size in different application.
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config ESP_MAIN_TASK_STACK_SIZE
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int "Main task stack size"
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default 3584
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help
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Configure the "main task" stack size. This is the stack of the task
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which calls app_main(). If app_main() returns then this task is deleted
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and its stack memory is freed.
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config ESP_IPC_TASK_STACK_SIZE
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int "Inter-Processor Call (IPC) task stack size"
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range 512 65536 if !APPTRACE_ENABLE
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range 2048 65536 if APPTRACE_ENABLE
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default 2048 if APPTRACE_ENABLE
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default 1024
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help
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Configure the IPC tasks stack size. One IPC task runs on each core
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(in dual core mode), and allows for cross-core function calls.
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See IPC documentation for more details.
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The default stack size should be enough for most common use cases.
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It can be shrunk if you are sure that you do not use any custom
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IPC functionality.
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config ESP_IPC_USES_CALLERS_PRIORITY
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bool "IPC runs at caller's priority"
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default y
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depends on !FREERTOS_UNICORE
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help
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If this option is not enabled then the IPC task will keep behavior
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same as prior to that of ESP-IDF v4.0, and hence IPC task will run
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at (configMAX_PRIORITIES - 1) priority.
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config ESP_MINIMAL_SHARED_STACK_SIZE
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int "Minimal allowed size for shared stack"
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default 2048
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help
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Minimal value of size, in bytes, accepted to execute a expression
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with shared stack.
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choice ESP_CONSOLE_UART
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prompt "UART for console output"
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default ESP_CONSOLE_UART_DEFAULT
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help
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Select whether to use UART for console output (through stdout and stderr).
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- Default is to use UART0 on pre-defined GPIOs.
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- If "Custom" is selected, UART0 or UART1 can be chosen,
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and any pins can be selected.
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- If "None" is selected, there will be no console output on any UART, except
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for initial output from ROM bootloader. This output can be further suppressed by
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bootstrapping GPIO13 pin to low logic level.
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config ESP_CONSOLE_UART_DEFAULT
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bool "Default: UART0"
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config ESP_CONSOLE_UART_CUSTOM
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bool "Custom"
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config ESP_CONSOLE_UART_NONE
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bool "None"
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endchoice
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choice ESP_CONSOLE_UART_NUM
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prompt "UART peripheral to use for console output (0-1)"
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depends on ESP_CONSOLE_UART_CUSTOM
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default ESP_CONSOLE_UART_CUSTOM_NUM_0
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help
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Due of a ROM bug, UART2 is not supported for console output
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via ets_printf.
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config ESP_CONSOLE_UART_CUSTOM_NUM_0
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bool "UART0"
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config ESP_CONSOLE_UART_CUSTOM_NUM_1
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bool "UART1"
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endchoice
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config ESP_CONSOLE_UART_NUM
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int
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default 0 if ESP_CONSOLE_UART_DEFAULT || ESP_CONSOLE_UART_NONE
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default 0 if ESP_CONSOLE_UART_CUSTOM_NUM_0
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default 1 if ESP_CONSOLE_UART_CUSTOM_NUM_1
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config ESP_CONSOLE_UART_TX_GPIO
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int "UART TX on GPIO#"
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range 0 46
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default 1 if IDF_TARGET_ESP32
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default 43 if IDF_TARGET_ESP32S2
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config ESP_CONSOLE_UART_RX_GPIO
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int "UART RX on GPIO#"
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range 0 46
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default 3 if IDF_TARGET_ESP32
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default 44 if IDF_TARGET_ESP32S2
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config ESP_CONSOLE_UART_BAUDRATE
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int "UART console baud rate"
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depends on !ESP_CONSOLE_UART_NONE
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default 115200
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range 1200 4000000
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config ESP_INT_WDT
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bool "Interrupt watchdog"
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default y
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help
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This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
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either because a task turned off interrupts and did not turn them on for a long time, or because an
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interrupt handler did not return. It will try to invoke the panic handler first and failing that
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reset the SoC.
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config ESP_INT_WDT_TIMEOUT_MS
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int "Interrupt watchdog timeout (ms)"
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depends on ESP_INT_WDT
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default 300 if !ESP32_SPIRAM_SUPPORT
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default 800 if ESP32_SPIRAM_SUPPORT
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range 10 10000
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help
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The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
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config ESP_INT_WDT_CHECK_CPU1
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bool "Also watch CPU1 tick interrupt"
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depends on ESP_INT_WDT && !FREERTOS_UNICORE
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default y
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help
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Also detect if interrupts on CPU 1 are disabled for too long.
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config ESP_TASK_WDT
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bool "Initialize Task Watchdog Timer on startup"
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default y
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help
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The Task Watchdog Timer can be used to make sure individual tasks are still
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running. Enabling this option will cause the Task Watchdog Timer to be
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initialized automatically at startup. The Task Watchdog timer can be
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initialized after startup as well (see Task Watchdog Timer API Reference)
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config ESP_TASK_WDT_PANIC
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bool "Invoke panic handler on Task Watchdog timeout"
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depends on ESP_TASK_WDT
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default n
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help
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If this option is enabled, the Task Watchdog Timer will be configured to
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trigger the panic handler when it times out. This can also be configured
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at run time (see Task Watchdog Timer API Reference)
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config ESP_TASK_WDT_TIMEOUT_S
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int "Task Watchdog timeout period (seconds)"
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depends on ESP_TASK_WDT
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range 1 60
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default 5
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help
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Timeout period configuration for the Task Watchdog Timer in seconds.
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This is also configurable at run time (see Task Watchdog Timer API Reference)
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config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
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bool "Watch CPU0 Idle Task"
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depends on ESP_TASK_WDT
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default y
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help
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If this option is enabled, the Task Watchdog Timer will watch the CPU0
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Idle Task. Having the Task Watchdog watch the Idle Task allows for detection
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of CPU starvation as the Idle Task not being called is usually a symptom of
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CPU starvation. Starvation of the Idle Task is detrimental as FreeRTOS household
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tasks depend on the Idle Task getting some runtime every now and then.
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config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1
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bool "Watch CPU1 Idle Task"
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depends on ESP_TASK_WDT && !FREERTOS_UNICORE
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default y
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help
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If this option is enabled, the Task Wtachdog Timer will wach the CPU1
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Idle Task.
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config ESP_PANIC_HANDLER_IRAM
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bool "Place panic handler code in IRAM"
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default n
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depends on IDF_TARGET_ESP32 # pending ESP32-S2 support
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help
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If this option is disabled (default), the panic handler code is placed in flash not IRAM.
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This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will
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automatically re-enable flash cache before running GDB Stub or Core Dump. This adds some minor
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risk, if the flash cache status is also corrupted during the crash.
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If this option is enabled, the panic handler code is placed in IRAM. This allows the panic
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handler to run without needing to re-enable cache first. This may be necessary to debug some
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complex issues with crashes while flash cache is disabled (for example, when writing to
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SPI flash.)
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config ESP_DEBUG_STUBS_ENABLE
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bool
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default COMPILER_OPTIMIZATION_LEVEL_DEBUG
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depends on !ESP32_TRAX && !ESP32S2_TRAX
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help
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Debug stubs are used by OpenOCD to execute pre-compiled onboard code
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which does some useful debugging stuff, e.g. GCOV data dump.
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config ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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bool
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config ESP_MAC_ADDR_UNIVERSE_WIFI_AP
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bool
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config ESP_MAC_ADDR_UNIVERSE_BT
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bool
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config ESP_MAC_ADDR_UNIVERSE_BT_OFFSET
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int
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default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
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default 1 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO
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config ESP_MAC_ADDR_UNIVERSE_ETH
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bool
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endmenu # Common ESP-related |