152 lines
5 KiB
C
Executable file
152 lines
5 KiB
C
Executable file
/*******************************************************************************
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Copyright (c) 2006-2007 Tensilica Inc.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be included
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in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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--------------------------------------------------------------------------------
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uart-16550.h Generic definitions for National Semiconductor 16550 UART
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This is used by board-support-packages with one or more 16550 compatible UARTs.
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A BSP provides a base address for each instance of a 16550 UART on the board.
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Note that a 16552 DUART (Dual UART) is simply two instances of a 16550 UART.
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*******************************************************************************/
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#ifndef _UART_16550_H_
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#define _UART_16550_H_
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/* C interface to UART registers. */
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struct uart_dev_s {
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union {
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uart16550_reg_t rxb; /* DLAB=0: receive buffer, read-only */
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uart16550_reg_t txb; /* DLAB=0: transmit buffer, write-only */
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uart16550_reg_t dll; /* DLAB=1: divisor, LS byte latch */
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} w0;
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union {
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uart16550_reg_t ier; /* DLAB=0: interrupt-enable register */
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uart16550_reg_t dlm; /* DLAB=1: divisor, MS byte latch */
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} w1;
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union {
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uart16550_reg_t isr; /* DLAB=0: interrupt status register, read-only */
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uart16550_reg_t fcr; /* DLAB=0: FIFO control register, write-only */
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uart16550_reg_t afr; /* DLAB=1: alternate function register */
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} w2;
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uart16550_reg_t lcr; /* line control-register, write-only */
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uart16550_reg_t mcr; /* modem control-regsiter, write-only */
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uart16550_reg_t lsr; /* line status register, read-only */
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uart16550_reg_t msr; /* modem status register, read-only */
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uart16550_reg_t scr; /* scratch regsiter, read/write */
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};
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#define _RXB(u) ((u)->w0.rxb)
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#define _TXB(u) ((u)->w0.txb)
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#define _DLL(u) ((u)->w0.dll)
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#define _IER(u) ((u)->w1.ier)
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#define _DLM(u) ((u)->w1.dlm)
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#define _ISR(u) ((u)->w2.isr)
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#define _FCR(u) ((u)->w2.fcr)
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#define _AFR(u) ((u)->w2.afr)
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#define _LCR(u) ((u)->lcr)
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#define _MCR(u) ((u)->mcr)
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#define _LSR(u) ((u)->lsr)
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#define _MSR(u) ((u)->msr)
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#define _SCR(u) ((u)->scr)
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typedef volatile struct uart_dev_s uart_dev_t;
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/* IER bits */
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#define RCVR_DATA_REG_INTENABLE 0x01
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#define XMIT_HOLD_REG_INTENABLE 0x02
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#define RCVR_STATUS_INTENABLE 0x04
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#define MODEM_STATUS_INTENABLE 0x08
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/* FCR bits */
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#define _FIFO_ENABLE 0x01
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#define RCVR_FIFO_RESET 0x02
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#define XMIT_FIFO_RESET 0x04
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#define DMA_MODE_SELECT 0x08
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#define RCVR_TRIGGER_LSB 0x40
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#define RCVR_TRIGGER_MSB 0x80
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/* AFR bits */
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#define AFR_CONC_WRITE 0x01
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#define AFR_BAUDOUT_SEL 0x02
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#define AFR_RXRDY_SEL 0x04
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/* ISR bits */
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#define INT_STATUS(r) ((r)&1)
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#define INT_PRIORITY(r) (((r)>>1)&0x7)
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/* LCR bits */
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#define WORD_LENGTH(n) (((n)-5)&0x3)
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#define STOP_BIT_ENABLE 0x04
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#define PARITY_ENABLE 0x08
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#define EVEN_PARITY 0x10
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#define FORCE_PARITY 0x20
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#define XMIT_BREAK 0x40
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#define DLAB_ENABLE 0x80
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/* MCR bits */
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#define _DTR 0x01
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#define _RTS 0x02
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#define _OP1 0x04
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#define _OP2 0x08
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#define LOOP_BACK 0x10
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/* LSR Bits */
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#define RCVR_DATA_READY 0x01
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#define OVERRUN_ERROR 0x02
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#define PARITY_ERROR 0x04
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#define FRAMING_ERROR 0x08
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#define BREAK_INTERRUPT 0x10
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#define XMIT_HOLD_EMPTY 0x20
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#define XMIT_EMPTY 0x40
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#define FIFO_ERROR 0x80
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#define RCVR_READY(u) (_LSR(u)&RCVR_DATA_READY)
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#define XMIT_READY(u) (_LSR(u)&XMIT_HOLD_EMPTY)
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/* MSR bits */
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#define _RDR 0x01
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#define DELTA_DSR 0x02
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#define DELTA_RI 0x04
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#define DELTA_CD 0x08
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#define _CTS 0x10
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#define _DSR 0x20
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#define _RI 0x40
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#define _CD 0x80
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/* Compute 16-bit divisor for baudrate generator, with rounding: */
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#define UART_DIVISOR(clock,baud) (((clock)/16 + (baud)/2)/(baud))
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/* Prototypes of driver functions */
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extern void uart16550_init( uart_dev_t *u, unsigned baud, unsigned ndata,
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unsigned parity, unsigned nstop );
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extern void uart16550_out( uart_dev_t *u, char c );
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extern char uart16550_in( uart_dev_t *u );
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extern unsigned uart16550_measure_sys_clk( uart_dev_t *u );
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#endif /* _UART_16550_H_ */
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