Darian Leung 1d2727f4c8 CAN Driver ... The following commit contains the first version of the ESP32 CAN Driver. closes #544		2018-07-04 14:01:57 +08:00
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esp32	CAN Driver	2018-07-04 14:01:57 +08:00
include/soc	soc: Fix check_long_hold_gpio and move def to soc	2018-06-22 09:20:27 +05:00
test	soc: add source code of rtc_clk, rtc_pm	2017-04-11 15:45:54 +08:00
component.mk	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00