24011ddd05
1. timer reg file for both time group 0 and time group 1, not only timer group 0 2. fix bug that io mux header file mismatch with chip 3. fix bug that some BASE address not correct 4. add some static function to eagle.fpga32.rom.addr.v7.ld 5. add interrupts usage table 6. add some comments for rom code functions
210 lines
5.6 KiB
C
210 lines
5.6 KiB
C
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef __ESP_INTR_H__
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#define __ESP_INTR_H__
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#include "rom/ets_sys.h"
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#include "freertos/xtensa_api.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define ESP_CCOMPARE_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_CCOMPARE_INUM, (func), (void *)(arg))
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#define ESP_EPWM_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_EPWM_INUM, (func), (void *)(arg))
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#define ESP_MPWM_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_MPWM_INUM, (func), (void *)(arg))
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#define ESP_SPI1_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_SPI1_INUM, (func), (void *)(arg))
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#define ESP_SPI2_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_SPI2_INUM, (func), (void *)(arg))
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#define ESP_SPI3_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_SPI3_INUM, (func), (void *)(arg))
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#define ESP_I2S0_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_I2S0_INUM, (func), (void *)(arg))
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#define ESP_PCNT_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_PCNT_INUM, (func), (void *)(arg))
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#define ESP_LEDC_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_LEDC_INUM, (func), (void *)(arg))
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#define ESP_WMAC_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_WMAC_INUM, (func), (void *)(arg))
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#define ESP_FRC_TIMER1_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_FRC_TIMER1_INUM, (func), (void *)(arg))
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#define ESP_FRC_TIMER2_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_FRC_TIMER2_INUM, (func), (void *)(arg))
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#define ESP_GPIO_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_GPIO_INUM, (func), (void *)(arg))
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#define ESP_UART0_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_UART0_INUM, (func), (void *)(arg))
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#define ESP_WDT_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_WDT_INUM, (func), (void *)(arg))
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#define ESP_RTC_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_RTC_INUM, (func), (void *)(arg))
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#define ESP_SLC_INTR_ATTACH(func, arg) \
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xt_set_interrupt_handler(ETS_SLC_INUM, (func), (void *)(arg))
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#define ESP_RMT_CTRL_INTRL(func,arg)\
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xt_set_interrupt_handler(ETS_RMT_CTRL_INUM, (func), (void *)(arg))
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#define ESP_INTR_ENABLE(inum) \
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xt_ints_on((1<<inum))
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#define ESP_INTR_DISABLE(inum) \
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xt_ints_off((1<<inum))
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#define ESP_CCOMPARE_INTR_ENBALE() \
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ESP_INTR_ENABLE(ETS_CCOMPARE_INUM)
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#define ESP_CCOMPARE_INTR_DISBALE() \
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ESP_INTR_DISABLE(ETS_CCOMPARE_INUM)
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#define ESP_SPI1_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_SPI1_INUM)
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#define ESP_SPI1_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_SPI1_INUM)
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#define ESP_SPI2_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_SPI2_INUM)
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#define ESP_PWM_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_PWM_INUM)
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#define ESP_PWM_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_PWM_INUM)
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#define ESP_SPI2_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_SPI2_INUM)
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#define ESP_SPI3_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_SPI3_INUM)
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#define ESP_SPI3_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_SPI3_INUM)
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#define ESP_I2S0_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_I2S0_INUM)
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#define ESP_I2S0_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_I2S0_INUM)
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#define ESP_I2S1_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_I2S1_INUM)
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#define ESP_I2S1_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_I2S1_INUM)
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#define ESP_MPWM_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_MPWM_INUM)
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#define ESP_EPWM_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_EPWM_INUM)
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#define ESP_MPWM_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_MPWM_INUM)
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#define ESP_EPWM_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_EPWM_INUM)
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#define ESP_BB_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_BB_INUM)
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#define ESP_BB_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_BB_INUM)
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#define ESP_UART0_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_UART0_INUM)
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#define ESP_UART0_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_UART0_INUM)
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#define ESP_LEDC_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_LEDC_INUM)
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#define ESP_LEDC_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_LEDC_INUM)
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#define ESP_GPIO_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_GPIO_INUM)
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#define ESP_GPIO_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_GPIO_INUM)
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#define ESP_WDT_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_WDT_INUM)
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#define ESP_WDT_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_WDT_INUM)
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#define ESP_FRC1_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
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#define ESP_FRC1_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_FRC_TIMER1_INUM)
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#define ESP_FRC2_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_FRC_TIMER2_INUM)
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#define ESP_FRC2_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_FRC_TIMER2_INUM)
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#define ESP_RTC_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_RTC_INUM)
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#define ESP_RTC_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_RTC_INUM)
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#define ESP_SLC_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_SLC_INUM)
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#define ESP_SLC_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_SLC_INUM)
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#define ESP_PCNT_INTR_ENABLE() \
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ESP_INTR_ENABLE(ETS_PCNT_INUM)
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#define ESP_PCNT_INTR_DISABLE() \
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ESP_INTR_DISABLE(ETS_PCNT_INUM)
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#define ESP_RMT_CTRL_ENABLE() \
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ESP_INTR_ENABLE(ETS_RMT_CTRL_INUM)
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#define ESP_RMT_CTRL_DIABLE() \
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ESP_INTR_DISABLE(ETS_RMT_CTRL_INUM)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ESP_INTR_H__ */
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