169 lines
5.5 KiB
C
169 lines
5.5 KiB
C
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _ROM_RTC_H_
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#define _ROM_RTC_H_
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#include "ets_sys.h"
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#include <stdbool.h>
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#include <stdint.h>
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#include "soc/soc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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AWAKE = 0, //CPU ON
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LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
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DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
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} SLEEP_MODE;
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typedef enum {
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NO_MEAN = 0,
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POWERON_RESET = 1, //1 Vbat power on reset, RTC reset
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// EXT_SYS_RESET = 2, //4 External System reset, RTC reset
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SW_RESET = 3, //6 Software warm reset
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OWDT_RESET = 4, //5 Watch dog reset
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DEEPSLEEP_RESET = 5, //2 Deep sleep timer reach reset.
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SDIO_RESET = 6, //3 Deep sleep Pbint power on reset [boot]
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TG0WDT_SYS_RESET = 7,
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TG1WDT_SYS_RESET = 8,
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RTCWDT_SYS_RESET = 9,
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INTRUSION_RESET = 10,
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TGWDT_CPU_RESET = 11,
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SW_CPU_RESET = 12,
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RTCWDT_CPU_RESET = 13,
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EXT_CPU_RESET = 14,
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RTCWDT_BROWN_OUT_RESET = 15,
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RTCWDT_RTC_RESET = 16
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} RESET_REASON;
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typedef enum {
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NO_SLEEP = 0,
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EXT_EVENT0_TRIG = BIT0,
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EXT_EVENT1_TRIG = BIT1,
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GPIO_TRIG = BIT2,
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TIMER_EXPIRE = BIT3,
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SDIO_TRIG = BIT4,
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MAC_TRIG = BIT5,
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UART0_TRIG = BIT6,
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UART1_TRIG = BIT7,
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TOUCH_TRIG = BIT8,
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SAR_TRIG = BIT9,
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BT_TRIG = BIT10
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} WAKEUP_REASON;
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typedef enum {
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DISEN_WAKEUP = NO_SLEEP,
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EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
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EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
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GPIO_TRIG_EN = GPIO_TRIG,
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TIMER_EXPIRE_EN = TIMER_EXPIRE,
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SDIO_TRIG_EN = SDIO_TRIG,
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MAC_TRIG_EN = MAC_TRIG,
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UART0_TRIG_EN = UART0_TRIG,
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UART1_TRIG_EN = UART1_TRIG,
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TOUCH_TRIG_EN = TOUCH_TRIG,
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SAR_TRIG_EN = SAR_TRIG,
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BT_TRIG_EN = BT_TRIG
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} WAKEUP_ENABLE;
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typedef enum {
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NO_INT = 0,
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WAKEUP_INT = BIT0,
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REJECT_INT = BIT1,
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SDIO_IDLE_INT = BIT2,
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RTC_WDT_INT = BIT3,
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RTC_TIME_VALID_INT = BIT4
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} RTC_INT_REASON;
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typedef enum {
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DISEN_INT = 0,
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WAKEUP_INT_EN = WAKEUP_INT,
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REJECT_INT_EN = REJECT_INT,
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SDIO_IDLE_INT_EN = SDIO_IDLE_INT,
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RTC_WDT_INT_EN = RTC_WDT_INT,
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RTC_TIME_VALID_INT_EN = RTC_TIME_VALID_INT
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}RTC_INT_EN;
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// Alive memory is a special memory block which could restore data during system
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// deep sleep. power management and wlan profile data may need put into this
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// memory area.
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// Should create a dram segment in link script.
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#define ALIVE_MEMORY_ADDR
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#define ALIVE_MEMORY_SIZE (1024 * 2)
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void rtc_hw_init(void);
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RESET_REASON rtc_get_reset_reason(int cpu_no);
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void software_reset(void);
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void software_reset_cpu(int cpu_no);
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void rtc_select_apb_bridge(bool sel);
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void rtc_set_sleep_mode(SLEEP_MODE mode, uint32_t sleep_sec, uint32_t wakeup_mode);
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uint8_t ets_rtc_recovery(void);
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#define MAX_DEEPSLEEP_DURATION (0xffffffff / RTC_CLK_FREQ)
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#define SECOND_TO_RTC_TICK(second) ((second)*RTC_CLK_FREQ) //32KHz
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#define CALIB_VALUE_TO_RTC_TICK(microsecond, clk_mkz, n_rtc,nclk) ((microsecond)*(clk_mkz)*(n_rtc)/(nclk)) //32KHz
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#define RTC_TICK_TO_SECOND(tick) ((tick)/RTC_CLK_FREQ )
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#define GET_CURRENT_TICK() (READ_PERI_REG(RTC_TIME))
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#define SET_WAKEUP_TICK(tick) (WRITE_PERI_REG(RTC_TIMER0, tick))
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//#define GET_WAKEUP_CAUSE() GET_PERI_REG_BITS2(RTC_STATE1, RTC_CNTL_WAKEUP_CAUSE, RTC_CNTL_WAKEUP_CAUSE_S)
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#define DISABLE_RTC_INT(int_type) CLEAR_PERI_REG_MASK(RTC_INT_ENA, int_type)
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#define ENABLE_RTC_INT(int_type) SET_PERI_REG_MASK(RTC_INT_ENA, int_type)
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#define CLR_RTC_INT(int_type) SET_PERI_REG_MASK(RTC_INT_CLR, int_type)
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#define GET_RTC_INT_CAUSE() GET_PERI_REG_BITS(RTC_INT_RAW, RTC_INT_RAW_MSB,RTC_INT_RAW_LSB)
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void rtc_register_deepsleep_timer(ETSTimer *timer, uint32_t tmout);
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void rtc_disable_deepsleep_timer(void);
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void rtc_enter_sleep(void);
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void ets_rtc_int_register(void);
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void dtm_set_intr_mask(uint32_t mask);
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uint32_t dtm_get_intr_mask(void);
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void dtm_set_params(uint32_t sleep_mode, uint32_t sleep_tm_ms, uint32_t wakeup_tm_ms, uint32_t sleep_times, uint32_t rxbcn_len);
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void save_rxbcn_mactime(uint32_t rxbcn_mactime);
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void save_tsf_us(uint32_t tsf_us);
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typedef void (* ets_idle_cb_t)(void *arg);
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typedef uint32_t (* ETS_GET_MACTIME)(void);
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typedef void (* ETS_WAKEUP_INIT)(void);
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void dtm_params_init(ETS_GET_MACTIME get_mactime, ETS_WAKEUP_INIT wakeup_init);
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void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
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void ets_enter_sleep(void);
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void rtc_intr_handler(void *);
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#define ETS_SLEEP_START(pfunc, parg) ets_set_idle_cb((pfunc), (parg));
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#define ETS_SLEEP_END() ets_set_idle_cb(NULL, NULL);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ROM_RTC_H_ */
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