24011ddd05
1. timer reg file for both time group 0 and time group 1, not only timer group 0 2. fix bug that io mux header file mismatch with chip 3. fix bug that some BASE address not correct 4. add some static function to eagle.fpga32.rom.addr.v7.ld 5. add interrupts usage table 6. add some comments for rom code functions
46 lines
1.2 KiB
C
46 lines
1.2 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _ROM_SECURE_BOOT_H_
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#define _ROM_SECURE_BOOT_H_
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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void ets_secure_boot_start(void);
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void ets_secure_boot_finish(void);
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void ets_secure_boot_hash(uint32_t *buf);
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void ets_secure_boot_obtain(void);
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int ets_secure_boot_check(uint32_t *buf);
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void ets_secure_boot_rd_iv(uint32_t *buf);
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void ets_secure_boot_rd_abstract(uint32_t *buf);
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bool ets_secure_boot_check_start(uint8_t abs_index, uint32_t iv_addr);
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int ets_secure_boot_check_finish(uint32_t *abstract);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ROM_SECURE_BOOT_H_ */
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