33 lines
847 B
C
33 lines
847 B
C
#ifndef _PSRAM_H
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#define _PSRAM_H
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#include "soc/spi_reg.h"
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#include "esp_err.h"
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#define PSRAM_READ 0x03
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#define PSRAM_FAST_READ 0x0B
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#define PSRAM_FAST_READ_QUAD 0xEB
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#define PSRAM_WRITE 0x02
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#define PSRAM_QUAD_WRITE 0x38
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#define PSRAM_ENTER_QMODE 0x35
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#define PSRAM_EXIT_QMODE 0xF5
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#define PSRAM_RESET_EN 0x66
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#define PSRAM_RESET 0x99
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#define PSRAM_SET_BURST_LEN 0xC0
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#define PSRAM_DEVICE_ID 0x9F
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typedef enum {
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PSRAM_SPI_1 = 0x1,
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PSRAM_SPI_2,
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PSRAM_SPI_3,
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PSRAM_SPI_MAX ,
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} psram_spi_num_t;
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typedef enum {
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PSRAM_CACHE_F80M_S40M = 0,//DO NOT USE FOR NOW
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PSRAM_CACHE_F40M_S40M, //SUPPORTED
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PSRAM_CACHE_F80M_S80M, //DO NOT USE FOR NOW
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PSRAM_CACHE_MAX,
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} psram_cache_mode_t;
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esp_err_t psram_enable(psram_cache_mode_t mode);
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#endif
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