367 lines
14 KiB
C
367 lines
14 KiB
C
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "esp_spiram.h"
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#include "rom/cache.h"
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#include "sdkconfig.h"
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#include "esp_himem.h"
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#include "soc/soc.h"
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#include "esp_log.h"
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/*
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So, why does the API look this way and is so inflexible to not allow any maps beyond the full 32K chunks? Most of
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it has to do with the fact that the cache works on the *virtual* addresses What this comes down to is that while it's
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allowed to map a range of physical memory into the address space two times, there's no cache consistency between the
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two regions.
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This means that a write to region A may or may not show up, perhaps delayed, in region B, as it depends on
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the time that the writeback to SPI RAM is done on A and the time before the corresponding cache line is invalidated
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on B. Note that this goes for every 32-byte cache line: this implies that if a program writes to address X and Y within
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A, the write to Y may show up before the write to X does.
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It gets even worse when both A and B are written: theoretically, a write to a 32-byte cache line in A can be entirely
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undone because of a write to a different addres in B that happens to be in the same 32-byte cache line.
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Because of these reasons, we do not allow double mappings at all. This, however, has other implications that make
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supporting ranges not really useful. Because the lack of double mappings, applications will need to do their own
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management of mapped regions, meaning they will normally map in and out blocks at a time anyway, as mapping more
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fluent regions would result in the chance of accidentally mapping two overlapping regions. As this is the case,
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to keep the code simple, at the moment we just force these blocks to be equal to the 32K MMU page size. The API
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itself does allow for more granular allocations, so if there's a pressing need for a more complex solution in the
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future, we can do this.
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Note: In the future, we can expand on this api to do a memcpy() between SPI RAM and (internal) memory using the SPI1
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peripheral. This needs support for SPI1 to be in the SPI driver, however.
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*/
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#if CONFIG_SPIRAM_BANKSWITCH_ENABLE
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#define SPIRAM_BANKSWITCH_RESERVE CONFIG_SPIRAM_BANKSWITCH_RESERVE
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#else
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#define SPIRAM_BANKSWITCH_RESERVE 0
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#endif
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#define CACHE_BLOCKSIZE (32*1024)
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//Start of the virtual address range reserved for himem use
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#define VIRT_HIMEM_RANGE_START (SOC_EXTRAM_DATA_LOW+(128-SPIRAM_BANKSWITCH_RESERVE)*CACHE_BLOCKSIZE)
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//Start MMU block reserved for himem use
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#define VIRT_HIMEM_RANGE_BLOCKSTART (128-SPIRAM_BANKSWITCH_RESERVE)
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//Start physical block
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#define PHYS_HIMEM_BLOCKSTART (128-SPIRAM_BANKSWITCH_RESERVE)
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#define TAG "esp_himem"
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#define HIMEM_CHECK(cond, str, err) if (cond) do {ESP_LOGE(TAG, "%s: %s", __FUNCTION__, str); return err; } while(0)
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// Metadata for a block of physical RAM
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typedef struct {
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unsigned int is_alloced: 1;
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unsigned int is_mapped: 1;
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} ramblock_t;
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//Metadata for a 32-K memory address range
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typedef struct {
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unsigned int is_alloced: 1;
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unsigned int is_mapped: 1;
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unsigned int ram_block: 16;
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} rangeblock_t;
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static ramblock_t *s_ram_descriptor = NULL;
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static rangeblock_t *s_range_descriptor = NULL;
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static int s_ramblockcnt = 0;
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static const int s_rangeblockcnt = SPIRAM_BANKSWITCH_RESERVE;
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//Handle for a window of address space
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typedef struct esp_himem_rangedata_t {
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int block_ct;
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int block_start;
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} esp_himem_rangedata_t;
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//Handle for a range of physical memory
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typedef struct esp_himem_ramdata_t {
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int block_ct;
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uint16_t *block;
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} esp_himem_ramdata_t;
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static portMUX_TYPE spinlock = portMUX_INITIALIZER_UNLOCKED;
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static inline int ramblock_idx_valid(int ramblock_idx)
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{
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return (ramblock_idx >= 0 && ramblock_idx < s_ramblockcnt);
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}
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static inline int rangeblock_idx_valid(int rangeblock_idx)
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{
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return (rangeblock_idx >= 0 && rangeblock_idx < s_rangeblockcnt);
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}
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static void set_bank(int virt_bank, int phys_bank, int ct)
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{
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int r;
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r = cache_sram_mmu_set( 0, 0, SOC_EXTRAM_DATA_LOW + CACHE_BLOCKSIZE * virt_bank, phys_bank * CACHE_BLOCKSIZE, 32, ct );
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assert(r == 0);
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r = cache_sram_mmu_set( 1, 0, SOC_EXTRAM_DATA_LOW + CACHE_BLOCKSIZE * virt_bank, phys_bank * CACHE_BLOCKSIZE, 32, ct );
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assert(r == 0);
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}
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size_t esp_himem_get_phys_size()
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{
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int paddr_start = (4096 * 1024) - (CACHE_BLOCKSIZE * SPIRAM_BANKSWITCH_RESERVE);
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return esp_spiram_get_size()-paddr_start;
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}
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size_t esp_himem_get_free_size()
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{
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size_t ret=0;
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for (int i = 0; i < s_ramblockcnt; i++) {
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if (!s_ram_descriptor[i].is_alloced) ret+=CACHE_BLOCKSIZE;
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}
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return ret;
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}
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size_t esp_himem_reserved_area_size() {
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return CACHE_BLOCKSIZE * SPIRAM_BANKSWITCH_RESERVE;
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}
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void __attribute__((constructor)) esp_himem_init()
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{
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if (SPIRAM_BANKSWITCH_RESERVE == 0) return;
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int maxram=esp_spiram_get_size();
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//catch double init
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HIMEM_CHECK(s_ram_descriptor != NULL, "already initialized", ); //Looks weird; last arg is empty so it expands to 'return ;'
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HIMEM_CHECK(s_range_descriptor != NULL, "already initialized", );
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//need to have some reserved banks
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HIMEM_CHECK(SPIRAM_BANKSWITCH_RESERVE == 0, "No banks reserved for himem", );
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//Start and end of physical reserved memory. Note it starts slightly under
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//the 4MiB mark as the reserved banks can't have an unity mapping to be used by malloc
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//anymore; we treat them as himem instead.
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int paddr_start = (4096 * 1024) - (CACHE_BLOCKSIZE * SPIRAM_BANKSWITCH_RESERVE);
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int paddr_end = maxram;
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s_ramblockcnt = ((paddr_end - paddr_start) / CACHE_BLOCKSIZE);
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//Allocate data structures
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s_ram_descriptor = calloc(sizeof(ramblock_t), s_ramblockcnt);
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s_range_descriptor = calloc(sizeof(rangeblock_t), SPIRAM_BANKSWITCH_RESERVE);
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if (s_ram_descriptor == NULL || s_range_descriptor == NULL) {
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ESP_EARLY_LOGE(TAG, "Cannot allocate memory for meta info. Not initializing!");
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free(s_ram_descriptor);
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free(s_range_descriptor);
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return;
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}
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ESP_EARLY_LOGI(TAG, "Initialized. Using last %d 32KB address blocks for bank switching on %d KB of physical memory.",
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SPIRAM_BANKSWITCH_RESERVE, (paddr_end - paddr_start)/1024);
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}
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//Allocate count not-necessarily consecutive physical RAM blocks, return numbers in blocks[]. Return
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//true if blocks can be allocated, false if not.
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static bool allocate_blocks(int count, uint16_t *blocks_out)
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{
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int n = 0;
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for (int i = 0; i < s_ramblockcnt && n != count; i++) {
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if (!s_ram_descriptor[i].is_alloced) {
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blocks_out[n] = i;
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n++;
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}
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}
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if (n == count) {
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//All blocks could be allocated. Mark as in use.
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for (int i = 0; i < count; i++) {
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s_ram_descriptor[blocks_out[i]].is_alloced = true;
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assert(s_ram_descriptor[blocks_out[i]].is_mapped == false);
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}
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return true;
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} else {
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//Error allocating blocks
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return false;
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}
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}
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esp_err_t esp_himem_alloc(size_t size, esp_himem_handle_t *handle_out)
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{
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if (size % CACHE_BLOCKSIZE != 0) {
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return ESP_ERR_INVALID_SIZE;
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}
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int blocks = size / CACHE_BLOCKSIZE;
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esp_himem_ramdata_t *r = calloc(sizeof(esp_himem_ramdata_t), 1);
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if (!r) {
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goto nomem;
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}
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r->block = calloc(sizeof(uint16_t), blocks);
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if (!r->block) {
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goto nomem;
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}
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portENTER_CRITICAL(&spinlock);
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int ok = allocate_blocks(blocks, r->block);
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portEXIT_CRITICAL(&spinlock);
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if (!ok) {
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goto nomem;
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}
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r->block_ct = blocks;
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*handle_out = r;
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return ESP_OK;
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nomem:
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if (r) {
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free(r->block);
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}
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free(r);
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return ESP_ERR_NO_MEM;
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}
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esp_err_t esp_himem_free(esp_himem_handle_t handle)
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{
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//Check if any of the blocks is still mapped; fail if this is the case.
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for (int i = 0; i < handle->block_ct; i++) {
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assert(ramblock_idx_valid(handle->block[i]));
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HIMEM_CHECK(s_ram_descriptor[handle->block[i]].is_mapped, "block in range still mapped", ESP_ERR_INVALID_ARG);
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}
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//Mark blocks as free
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portENTER_CRITICAL(&spinlock);
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for (int i = 0; i < handle->block_ct; i++) {
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s_ram_descriptor[handle->block[i]].is_alloced = false;
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}
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portEXIT_CRITICAL(&spinlock);
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//Free handle
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free(handle->block);
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free(handle);
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return ESP_OK;
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}
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esp_err_t esp_himem_alloc_map_range(size_t size, esp_himem_rangehandle_t *handle_out)
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{
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HIMEM_CHECK(s_ram_descriptor == NULL, "Himem not available!", ESP_ERR_INVALID_STATE);
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HIMEM_CHECK(size % CACHE_BLOCKSIZE != 0, "requested size not aligned to blocksize", ESP_ERR_INVALID_SIZE);
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int blocks = size / CACHE_BLOCKSIZE;
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esp_himem_rangedata_t *r = calloc(sizeof(esp_himem_rangedata_t), 1);
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if (!r) {
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return ESP_ERR_NO_MEM;
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}
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r->block_ct = blocks;
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r->block_start = -1;
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int start_free = 0;
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portENTER_CRITICAL(&spinlock);
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for (int i = 0; i < s_rangeblockcnt; i++) {
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if (s_range_descriptor[i].is_alloced) {
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start_free = i + 1; //optimistically assume next block is free...
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} else if (i - start_free == blocks - 1) {
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//We found a span of blocks that's big enough to allocate the requested range in.
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r->block_start = start_free;
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break;
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}
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}
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if (r->block_start == -1) {
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//Couldn't find enough free blocks
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free(r);
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portEXIT_CRITICAL(&spinlock);
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return ESP_ERR_NO_MEM;
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}
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//Range is found. Mark the blocks as in use.
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for (int i = 0; i < blocks; i++) {
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s_range_descriptor[r->block_start + i].is_alloced = 1;
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}
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portEXIT_CRITICAL(&spinlock);
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//All done.
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*handle_out = r;
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return ESP_OK;
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}
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esp_err_t esp_himem_free_map_range(esp_himem_rangehandle_t handle)
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{
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//Check if any of the blocks in the range have a mapping
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for (int i = 0; i < handle->block_ct; i++) {
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assert(rangeblock_idx_valid(handle->block_start + i));
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assert(s_range_descriptor[i + handle->block_start].is_alloced == 1); //should be, if handle is valid
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HIMEM_CHECK(s_range_descriptor[i + handle->block_start].is_mapped, "memory still mapped to range", ESP_ERR_INVALID_ARG);
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}
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//We should be good to free this. Mark blocks as free.
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portENTER_CRITICAL(&spinlock);
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for (int i = 0; i < handle->block_ct; i++) {
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s_range_descriptor[i + handle->block_start].is_alloced = 0;
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}
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portEXIT_CRITICAL(&spinlock);
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free(handle);
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return ESP_OK;
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}
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esp_err_t esp_himem_map(esp_himem_handle_t handle, esp_himem_rangehandle_t range, size_t ram_offset, size_t range_offset, size_t len, int flags, void **out_ptr)
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{
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int ram_block = ram_offset / CACHE_BLOCKSIZE;
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int range_block = range_offset / CACHE_BLOCKSIZE;
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int blockcount = len / CACHE_BLOCKSIZE;
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HIMEM_CHECK(s_ram_descriptor == NULL, "Himem not available!", ESP_ERR_INVALID_STATE);
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//Offsets and length must be block-aligned
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HIMEM_CHECK(ram_offset % CACHE_BLOCKSIZE != 0, "ram offset not aligned to blocksize", ESP_ERR_INVALID_ARG);
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HIMEM_CHECK(range_offset % CACHE_BLOCKSIZE != 0, "range not aligned to blocksize", ESP_ERR_INVALID_ARG);
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HIMEM_CHECK(len % CACHE_BLOCKSIZE != 0, "length not aligned to blocksize", ESP_ERR_INVALID_ARG);
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//ram and range should be within allocated range
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HIMEM_CHECK(ram_block + blockcount > handle->block_ct, "args not in range of phys ram handle", ESP_ERR_INVALID_SIZE);
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HIMEM_CHECK(range_block + blockcount > range->block_ct, "args not in range of range handle", ESP_ERR_INVALID_SIZE);
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//Check if ram blocks aren't already mapped, and if memory range is unmapped
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for (int i = 0; i < blockcount; i++) {
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HIMEM_CHECK(s_ram_descriptor[handle->block[i + ram_block]].is_mapped, "ram already mapped", ESP_ERR_INVALID_STATE);
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HIMEM_CHECK(s_range_descriptor[range->block_start + i + range_block].is_mapped, "range already mapped", ESP_ERR_INVALID_STATE);
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}
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//Map and mark as mapped
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portENTER_CRITICAL(&spinlock);
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for (int i = 0; i < blockcount; i++) {
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assert(ramblock_idx_valid(handle->block[i + ram_block]));
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s_ram_descriptor[handle->block[i + ram_block]].is_mapped = 1;
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s_range_descriptor[range->block_start + i + range_block].is_mapped = 1;
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s_range_descriptor[range->block_start + i + range_block].ram_block = handle->block[i + ram_block];
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}
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portEXIT_CRITICAL(&spinlock);
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for (int i = 0; i < blockcount; i++) {
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set_bank(VIRT_HIMEM_RANGE_BLOCKSTART + range->block_start + i + range_block, handle->block[i + ram_block] + PHYS_HIMEM_BLOCKSTART, 1);
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}
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//Set out pointer
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*out_ptr = (void *)(VIRT_HIMEM_RANGE_START + (range->block_start + range_offset) * CACHE_BLOCKSIZE);
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return ESP_OK;
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}
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esp_err_t esp_himem_unmap(esp_himem_rangehandle_t range, void *ptr, size_t len)
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{
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//Note: doesn't actually unmap, just clears cache and marks blocks as unmapped.
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//Future optimization: could actually lazy-unmap here: essentially, do nothing and only clear the cache when we re-use
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//the block for a different physical address.
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int range_offset = (uint32_t)ptr - VIRT_HIMEM_RANGE_START;
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int range_block = (range_offset / CACHE_BLOCKSIZE) - range->block_start;
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int blockcount = len / CACHE_BLOCKSIZE;
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HIMEM_CHECK(range_offset % CACHE_BLOCKSIZE != 0, "range offset not block-aligned", ESP_ERR_INVALID_ARG);
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HIMEM_CHECK(len % CACHE_BLOCKSIZE != 0, "map length not block-aligned", ESP_ERR_INVALID_ARG);
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HIMEM_CHECK(range_block + blockcount > range->block_ct, "range out of bounds for handle", ESP_ERR_INVALID_ARG);
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portENTER_CRITICAL(&spinlock);
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for (int i = 0; i < blockcount; i++) {
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int ramblock = s_range_descriptor[range->block_start + i + range_block].ram_block;
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assert(ramblock_idx_valid(ramblock));
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s_ram_descriptor[ramblock].is_mapped = 0;
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s_range_descriptor[range->block_start + i + range_block].is_mapped = 0;
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}
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esp_spiram_writeback_cache();
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portEXIT_CRITICAL(&spinlock);
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return ESP_OK;
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}
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