38 lines
1.4 KiB
C
38 lines
1.4 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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/* This header contains register/bit masks for the standard
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PHY MII registers that should be supported by all PHY models.
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*/
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#define MII_BASIC_MODE_CONTROL_REG (0x0)
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#define MII_SOFTWARE_RESET BIT(15)
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#define MII_BASIC_MODE_STATUS_REG (0x1)
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#define MII_AUTO_NEGOTIATION_COMPLETE BIT(5)
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#define MII_LINK_STATUS BIT(2)
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#define MII_PHY_IDENTIFIER_1_REG (0x2)
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#define MII_PHY_IDENTIFIER_2_REG (0x3)
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#define MII_AUTO_NEG_ADVERTISEMENT_REG (0x4)
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#define MII_ASM_DIR BIT(11)
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#define MII_PAUSE BIT(10)
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#define MII_PHY_LINK_PARTNER_ABILITY_REG (0x5)
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#define MII_PARTNER_ASM_DIR BIT(11)
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#define MII_PARTNER_PAUSE BIT(10)
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