52 commits

Author	SHA1	Message	Date
jack	24011ddd05	header files: modify rom code and soc header files ... 1. timer reg file for both time group 0 and time group 1, not only timer group 0 2. fix bug that io mux header file mismatch with chip 3. fix bug that some BASE address not correct 4. add some static function to eagle.fpga32.rom.addr.v7.ld 5. add interrupts usage table 6. add some comments for rom code functions	2016-09-12 17:47:49 +08:00
Wu Jian Gang	c3102e8fb2	ld: seperate/rename eagle.xxx.ld to esp32.xxx.ld	2016-08-25 11:07:53 +08:00

Renamed from components/esp32/ld/eagle.fpga32.rom.addr.v7.ld (Browse further)