The SPI bus lock on SPI1 introduces two side effects:
1. The device lock for the main flash requires the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` to be selected, however this
option is disabled by default in earlier IDF versions. Some developers
may find their project cannot be built by their old sdkconfig files.
2. Usually we don't need the lock on the SPI1 bus, due to it's
restrictions. However the overhead still exists in this case, the IRAM
cost for static version of semaphore functions, and the time cost when
getting and releasing the lock.
This commit:
1. Add a CONFIG_SPI_FLASH_BYPASS_MAIN_LOCK option, which will forbid the
space cost, as well as the initialization of the main bus lock.
2. When the option is not selected, the bus lock is used, the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` will be selected explicitly.
3. Revert default value of `CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION`
to `n`.
introduced in 49a48644e4.
Closes https://github.com/espressif/esp-idf/issues/5046
Basic set of configuration related to UART moved from KConfig
to runtime configuration structure to simplify reusing the component for
testing and examples.
Fixes Guru Meditation Error: Core 0 panic'ed (LoadProhibited) when config with
CONFIG_PM_ENABLE=y && CONFIG_PM_DFS_INIT_AUTO=y.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Merges https://github.com/espressif/esp-idf/pull/4904
pppos_client example used the UART default clock configuration which might
cause issues if power management enabled. Settings updated to UART_SCLK_REF_TICK
Also need to explicitly disable RX interrupts in UART pattern detection
mode.
Closes https://github.com/espressif/esp-idf/issues/4801
Since the recent refactoring of spi bus_lock comonent introduced heavy logging under debug/verbose level of verbosity, the http-server test executed in the CI became less stable due to complicated regex. Fixed by removing the first optional group
check master read write functions with array of registers)
fix master serial processing code and modbus controller to work with register array
modbus_master: add reading and writing of test value array (58 registers) to check failure is gone
remove parameter temporary buffer from modbus controller to allow more than 24 byte writes
driver: fix issue with TOUT feature
driver: fix uart_rx_timeout issue
driver: fix issue with rxfifo_tout_int_raw not triggered when received fifo_len = 120 byte and all bytes read out of fifo as result of rxfifo_full_int_raw
driver: add function uart_internal_set_always_rx_timeout() to always handle tout interrupt
examples: call uart_internal_set_always_rx_timeout() to handle tout interrupt correctly
examples: update examples to use tout feature
driver: reflect changes of uart_set_always_rx_timeout() function, change uart.c
driver: change conditions to trigger workaround for tout feature in uart.c
driver: change uart_set_always_rx_timeout()
freemodbus: fix tabs, remove commented code
driver: remove uart_ll_is_rx_idle()
Fix below build error:
../main/udp_client.c: In function 'udp_client_task':
../main/udp_client.c:58:41: error: 'addr_str' undeclared (first use in this function); did you mean 'caddr_t'?
Fixes: 995ef85e85 ("socket examples: add tests for server and client applications")
Signed-off-by: Axel Lin <axel.lin@gmail.com>
tout_thr - move calculation and masking into hal layer update driver and uart_ll (add uart_ll_set_rx_tout)
move tout calculation into uart_ll
move calculation of time out in bit time for esp32s2 into low level uart_ll.h file
move uart_hal_get_symb_len() into hal
update set_rx_timeout() to warn user about incorrect value
update HAL, LL 1
fix uart_xx_set_rx_tout() to convert symbol time into bit time
update param description
update tout calculation in LL
update uart_hal_get_max_rx_timeout_thrd() and uart_ll_get_max_rx_timeout_thrd()
Using the ble mesh white list test functions, a node can choose to
only receive mesh messages from a specific node and relay the
messages for it. Messages from other nodes will be ignored.
