* Erase range operations allow preemption after each block or sector.
* Write operations allow preemption every 8KB of data.
* Reado operations allow preemption every 16KB of data.
This is to avoid confusion when idf_monitor prints the first symbol in each section, ie "WindowOverflow4" or similar,
when bootloader prints the section mapping address.
Closes#447https://github.com/espressif/esp-idf/issues/447
* "make monitor" not passed the configured baud rate
Closes#436https://github.com/espressif/esp-idf/issues/436
* Pass toolchain prefix from sdkconfig into monitor tool
* Allow setting EOL in idf_monitor.py, use CRLF by default
* Detect if /dev/tty.X is used on macOS, warn and replace with /dev/cu.X
* If a build fails or gdb exits, ignore Ctrl-T (allowing Ctrl-T Ctrl-A/F to be same key sequence everywhere)
* Add a note about winpty on Windows
Ref 02fdf8271d (commitcomment-21369196)
This is substantially faster than the 'git submodule status' command, has same effect. Particularly noticeable on
Windows, where 'submodule status' takes 2 seconds and 'status' takes 0.2 seconds.
modify touch pad read function
The touch pad read function taks too much time within spin lock waiting for the "done bit". (about 7.6ms as we tested)
So we try to use a mutex on the touch read function and any other functions might change the "done bit".
See merge request !543
bugfix: i2c driver not working in 'RELEASE' configuration
This issue is reported from https://github.com/espressif/esp-idf/issues/304.
We found that when we operate the hw command registers in I2C struct, sometimes the behaviour would be different in DEBUG/RELEASE optimisation level:
The code looks like this:
```
I2C[i2c_num]->command[p_i2c->cmd_idx].byte_num -= 0;
```
In DEBUG configuration:
```
I2C[i2c_num]->command[p_i2c->cmd_idx].byte_num -= 0;
400f3ab0: 3388 l32i.n a8, a3, 12
400f3ab2: 14c882 addi a8, a8, 20
400f3ab5: a08840 addx4 a8, a8, a4
400f3ab8: 0020c0 memw
400f3abb: 2898 l32i.n a9, a8, 8
400f3abd: 0020c0 memw
400f3ac0: 28b8 l32i.n a11, a8, 8
400f3ac2: 74a090 extui a10, a9, 0, 8
400f3ac5: 00af92 movi a9, 0xffffff00
400f3ac8: 109b90 and a9, a11, a9
400f3acb: 2099a0 or a9, a9, a10
400f3ace: 0020c0 memw
400f3ad1: 2899 s32i.n a9, a8, 8
```
In RELEASE configuration:
```
I2C[i2c_num]->command[p_i2c->cmd_idx].byte_num -= 0;
400f2ba2: 580572 l8ui a7, a5, 88
400f2ba5: 747070 extui a7, a7, 0, 8
400f2ba8: 0020c0 memw
400f2bab: 584572 s8i a7, a5, 88
```
Looks like the compiler will make it a 8bit operation after optimisation.
But the register value changes from 0x901 to 0x101.
After this 8-bit optimisation, the 11th bit changed from 1 to zero, which caused this error.
We are still trying to find out why that happens, because there might be some risk when operating the register struct.
This is a workaround to avoid "-=" operation on I2C register struct fields.
See merge request !592
This issue is reported from https://github.com/espressif/esp-idf/issues/304.
We found that when we operate the hw command registers in I2C struct, sometimes the behaviour would be different in DEBUG/RELEASE optimisation level:
The code looks like this:
I2C[i2c_num]->command[p_i2c->cmd_idx].byte_num -= 0;
In DEBUG configuration:
I2C[i2c_num]->command[p_i2c->cmd_idx].byte_num -= 0;
400f3ab0: 3388 l32i.n a8, a3, 12
400f3ab2: 14c882 addi a8, a8, 20
400f3ab5: a08840 addx4 a8, a8, a4
400f3ab8: 0020c0 memw
400f3abb: 2898 l32i.n a9, a8, 8
400f3abd: 0020c0 memw
400f3ac0: 28b8 l32i.n a11, a8, 8
400f3ac2: 74a090 extui a10, a9, 0, 8
400f3ac5: 00af92 movi a9, 0xffffff00
400f3ac8: 109b90 and a9, a11, a9
400f3acb: 2099a0 or a9, a9, a10
400f3ace: 0020c0 memw
400f3ad1: 2899 s32i.n a9, a8, 8
In RELEASE configuration:
I2C[i2c_num]->command[p_i2c->cmd_idx].byte_num -= 0;
400f2ba2: 580572 l8ui a7, a5, 88
400f2ba5: 747070 extui a7, a7, 0, 8
400f2ba8: 0020c0 memw
400f2bab: 584572 s8i a7, a5, 88
Looks like the compiler will make it a 8bit operation after optimisation.
But the register value changes from 0x901 to 0x101.
After this 8-bit optimisation, the 11th bit changed from 1 to zero, which caused this error.
We are still trying to find out why that happens, because there might be some risk when operating the register struct.
This is a workaround to avoid "-=" operation on I2C register struct fields.
1. Add low speed channels for LEDC module.
2. Improve fade object allocate mechanism.
3. Improve ledc example, add 2 low speed channels in example.
4. Remove debug code
5. Improve the register bit field name of slow clock.
esp32: update wifi lib for some bugfix/features
1. add options to disable nvs
2. add station keepalive with softap
3. fix beacon rx start time not accurate issue
4. set wifi rx desc/buffer boundary check to internal memory boundary
See merge request !578
nvs_flash_init may return an error code in some cases, and applications
should check this error code (or at least assert on it being ESP_OK, to
make potential issues more immediately obvious).
This change modifies all the examples which use NVS to check the error
code. Most examples get a simple ESP_ERROR_CHECK assert, while NVS
examples, OTA example, and NVS unit tests get a more verbose check which
may be used in real applications.
