Split common SPI stuff out of master driver; add slave driver; add workaround for DMA issue.
This merge req mainly adds a slave device. In order to do this, the original master driver is refactored into common code shared by master and slave modes, and a slave driver is added.
The other things added are:
- Added a workaround for a 'feature' of the ESP32 silicon that can lock up the receive DMA channel in some situations. This can only be fixed by resetting *both* DMA channels. The workaround implemented makes sure that the reset only happens when both channels are idle
- Got rid of the automatic choice between register- and DMA-based transfers. The master (and slave) code will now always go for a DMA transfer if a DMA channel is given, and always go for register-based transfers if no DMA channel is given.
- Add in a bunch of fixes for outstanding Github issues.
See merge request !659
Add support 24, 32 bits
@jxmao optimize i2s_zero_buffer
@jxmao correct config support slave mode
@jxmao correct setup pin support tx/rx at the same time
Enhance pin power
@jxmao add dynamic change number of channels
remove nvs_init
remove start log and enhance power pin setup
using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params
validate i2s_bits_per_sample and channel
check tx & rx buffer before fill zero
remove checking channel as @jxmao suggest
limit dma buffer
modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512
Add support 24, 32 bits
reduce push function
Modify sample can test with 24, 32-bits
Add i2s sample README
Fixed i2s_set_clk got reset sometime
can changes bit-wide while running
Fix sample rate calculation for DAC mode from @jeroen
modify example can change bits per sample every 5 seconds
cleanup
add comment for bytes_per_sample
update as @angus suggestions
Add i2s_set_clk api
I2S driver bug fixed as following log:
@jxmao optimize i2s_zero_buffer
@jxmao correct config support slave mode
@jxmao correct setup pin support tx/rx at the same time
Enhance pin power
@jxmao add dynamic change number of channels
remove nvs_init
remove start log and enhance power pin setup
using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params
validate i2s_bits_per_sample and channel
check tx & rx buffer before fill zero
remove checking channel as @jxmao suggest
limit dma buffer
modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512
limit dma buffer to 4092
change gpio_matrix_*_check to inline function, remove some comments and rename test_i2s function to setup_triangle_sine_waves
for change commit title
esp32: Core dump sanity checks
Adds sanity checks when doing core dump to flash
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
Ref TW11879
See merge request !686
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
add support for 32k XTAL as RTC_SLOW_CLK source
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
Ref TW11683.
Ref https://esp32.com/viewtopic.php?f=13&t=1570
Fixes https://github.com/espressif/esp-idf/issues/337.
See merge request !696
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
Add support 24, 32 bits
@jxmao optimize i2s_zero_buffer
@jxmao correct config support slave mode
@jxmao correct setup pin support tx/rx at the same time
Enhance pin power
@jxmao add dynamic change number of channels
remove nvs_init
remove start log and enhance power pin setup
using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params
validate i2s_bits_per_sample and channel
check tx & rx buffer before fill zero
remove checking channel as @jxmao suggest
limit dma buffer
modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512
Add support 24, 32 bits
reduce push function
Modify sample can test with 24, 32-bits
Add i2s sample README
Fixed i2s_set_clk got reset sometime
can changes bit-wide while running
Fix sample rate calculation for DAC mode from @jeroen
modify example can change bits per sample every 5 seconds
cleanup
add comment for bytes_per_sample
update as @angus suggestions
Add i2s_set_clk api
I2S driver bug fixed as following log:
@jxmao optimize i2s_zero_buffer
@jxmao correct config support slave mode
@jxmao correct setup pin support tx/rx at the same time
Enhance pin power
@jxmao add dynamic change number of channels
remove nvs_init
remove start log and enhance power pin setup
using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params
validate i2s_bits_per_sample and channel
check tx & rx buffer before fill zero
remove checking channel as @jxmao suggest
limit dma buffer
modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512
limit dma buffer to 4092
change gpio_matrix_*_check to inline function, remove some comments and rename test_i2s function to setup_triangle_sine_waves
for change commit title
Fix secure boot enable - can verify bootloader image
Secure boot enable would fail because esp_image_basic_verify() would fail to verify the bootloader image.
* Failure prevented secure boot from enabling.
* Also adds unit test cases for esp_image_basic_verify()
Ref https://esp32.com/viewtopic.php?f=2&t=1602
TW11878
See merge request !693
1.change the rowdata to rodata;
2.change BT_ACL_CONNECTIONS to Maximum BT/BLE connection count.
3. change the comments of bt_target.h:505 from 40 to 5.
wear levelling
This MR adds wear levelling component. It presents an interface similar to the interface of spi_flash and esp_partition. Inside, it stores data inside a partition to in a way that reduces worst case number of erase cycles for any given sector.
Also included are APIs similar to the ones provided for SDMMC to mount FAT filesystem on top of the wear levelling partition. A simple example shows how this API can be used.
Ref TW10338.
See merge request !567
lwip: fix error when building on OS X, only build ppp if enabled
- reorder directories listed in COMPONENT_SRCDIRS so that
subdirectories precede parent directories
- don’t include PPP source directories if PPP support is not enabled
See merge request !700
- reorder directories listed in COMPONENT_SRCDIRS so that
subdirectories precede parent directories
- don’t include PPP source directories if PPP support is not enabled
1. close classic bt, can save 233k code size;
2. close smp module, can save 136k code size;
3. close gattc module, can save 24k code size;
4. close gatts module, can save 16k code size;
4. close the bluedroid stack log, can save 120k code size.
XTAL frequency detection, support for selecting XTAL frequency
This MR adds more robust XTAL frequency detection code (which gets run in the bootloader) and an option to set XTAL frequency in Kconfig. By default we still use autodetection, since it is more reliable than the one used in ROM code.
This will help with issues about XTAL frequency detection in high ambient temperature conditions.
Ref TW12008
See merge request !694
sdmmc: handle card removal when CD is not used
When SD card is removed during transaction, SDMMC peripheral can report
a range of errors, such as timeouts, CRC errors, start/end bit errors.
Under normal conditions (card is inserted), SDMMC peripheral also generates
command done or data done interrupts. When the card is removed, such
interrupts may not be always generated.
This change fixes handling of timeout interrupts and SBE interrupts.
It also adds a one second timeout into the event processing loop. This
timeout allows applications to recover in cases when the SDMMC peripheral
doesn’t generate command/data done event on card removal.
Fixes TW11592.
See merge request !678
fat/sdmmc: unmount FATFS object on error
Failure to call f_mount(NULL,...) makes FATFS attempt to clean up the old
FS object upon next mount. If previous mount operation has failed, some
parts of FS object may not be fully initialized, which will cause errors
(such as attempting to delete a mutex which wasn’t allocated).
Fixes TW11594.
See merge request !679
ROM code already implements XTAL frequency detection, but it uses the 8M
clock before the clock tuning parameters are initialized. With the
zero clock tuning parameter, 8M clock has significant frequency deviation
at high temperatures, which can lead to erroneous detection of 40 MHz
crystal as a 26 MHz one.
This change adds XTAL frequency detection code to rtc_clk_init routine,
and detection is performed after the 8M clock tuning parameter as been
initialized.
Fix device_name check in gatt_client example
`strcmp` was used against `adv_name` array, which was not a zero terminated string, causing `strcmp` check to fail for valid names.
Ref. https://github.com/espressif/esp-idf/pull/502
See merge request !652
