Commit graph

8 commits

Author SHA1 Message Date
Angus Gratton
c38c3ff3f0 spi_flash: Remove 16KB free internal heap limit for esp_flash_read() into PSRAM
Allocation of the temporary internal buffer will now repeat until a small enough buffer can be
allocated, and only fail if less than a 256 byte block of internal RAM is free.

Adds unit test for the same, and generic test utility for creating memory pressure.
2020-03-09 09:59:43 +11:00
Angus Gratton
af4c6ac0f3 spi_flash: Fix over-allocation and OOM crash when reading from SPI flash to PSRAM buffers
Previously would try allocate buffer of minimum size 16KB not maximum size 16KB, causing
out of memory errors for any large reads, or if less than 16KB contiguous free heap.

Also, if using legacy API and internal allocation failed then implementation would abort()
instead of returning the error to the caller.

Added test for using large buffers in PSRAM.

Closes https://github.com/espressif/esp-idf/issues/4769

Also reported on forum: https://esp32.com/viewtopic.php?f=13&t=14304&p=55972
2020-03-05 17:11:26 +11:00
Michael (XIAO Xufeng)
6f6677ac42 spi: move deprecated functions into internal header
Resolves https://github.com/espressif/esp-idf/issues/4132
2019-12-24 17:43:32 +08:00
Michael (XIAO Xufeng)
337b1df430 esp_flash: add unit test for external flash and QE toggling
Tests for external flash chips used to controlled by macros, one bin for
one chip. And tests are done manually. This commit refactored the test
so that all 3 chips can all run in single test.
2019-11-21 12:26:15 +08:00
Michael (XIAO Xufeng)
2b7681ec4f esp_flash: fix set qe bit and write command issues
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
2019-11-21 12:26:14 +08:00
Michael (XIAO Xufeng)
1cc860216e esp_flash: fix the set/get write protection functions
Add support for get write protection support, fixed the duplicated
set_write_protection link.

All the write_protection check in the top layer are removed. The lower
levels (chip) should ensure to disable write protection before the
operation start.
2019-08-20 14:05:35 +08:00
Michael (XIAO Xufeng)
d6bd24ca67 esp_flash: add initialization interface for SPI devices 2019-06-27 13:27:27 +08:00
Michael (XIAO Xufeng)
1036a091fe spi_flash: support working on differnt buses and frequency 2019-06-18 06:32:52 +00:00