Since 94250e42a0, UART output is suspended when entering sleep mode
(deep or light sleep). This makes sense for light sleep, where sleep
normally takes small amount of time, and flushing the UART would add
a lot of latency. But this breaks existing behaviour for deep sleep,
where UART output was previously sent out before entering sleep mode.
Closes https://github.com/espressif/esp-idf/issues/2145
1. Move channel to the first row of the table.
2. Remove the condition of HT20/HT40 for they are determined by
secondary channel.
3. Clean up the CSI table.
INTERRUPT and CCOUNT registers will change outside of program control.
Making the inline assembly used to read these registers volatile
indicates this fact to the compiler.
Fixes https://github.com/espressif/esp-idf/issues/2127
1. fix BLE connection missing in coex mode
2. modify other parameters to make coex priority more reasonable
3. fix modem sleep procedure trap cause Wifi disable RF when BT is
working. Such cause that BR/EDR is difficult to be connected, BLE
connection stability decrease and so on.
4. modify BR/EDR coexist duration to imrove BR/EDR connect success
ratio.
5. Due to the hardware coexist bug, BLE scan interval/window should
be less than 0x100(about 160ms). Therefore, it will cause BLE cannot
scan any advertising packet while WiFi have higher priority
behaviour(such like RX beacon, scan, TX/RX VO packets and etc.).
1. add APIs to set/get announce interval values.
2. add API to enable/disable the min rate to 6Mbps for data packages.
3. add APIs to set/get RSSI threshold values.
4. fix ap_loss.
Since commit 94250e4, EXT0 wakeup mechanism, when wakeup level was set
to 0, started waking up chip immediately after entering deep sleep.
This failure was triggered in that commit by a change of
RTC_CNTL_MIN_SLP_VAL (i.e. minimum time in sleep mode until wakeup
can happen) from 128 cycles to 2 cycles.
The reason for this behaviour is related to the way input enable (IE)
signal going into an RTC pad is obtained:
PAD_IE = (SLP_SEL) ? SLP_IE & CHIP_SLEEP : IE,
where SLP_IE, SLP_SEL, and IE are bits of an RTC_IO register related
to the given pad. CHIP_SLEEP is the signal indicating that chip has
entered sleep mode.
The code in prepare_ext{0,1}_wakeup did not enable IE, but did enable
SLP_SEL and SLP_IE. This meant that until CHIP_SLEEP went high, PAD_IE
was 0, hence the input from the pad read 0 even if external signal
was 1. CHIP_SLEEP went high on the 2nd cycle of sleep. So when
RTC_CNTL_MIN_SLP_VAL was set to 2, the input signal from the pad was
latched as 0 at the moment when CHIP_SLEEP went high, causing EXT0
wakeup with level 0 to trigger.
This commit changes the way PAD_IE is enabled: SLP_SEL and SLP_IE are
no longer used, and IE is set to 1. If EXT0 wakeup is used, RTC_IO is
not powered down, so IE signal stays 1 both before CHIP_SLEEP goes
high and after. If EXT1 wakeup is used, RTC_IO may be powered down.
However prepare_ext1_wakeup enables Hold on the pad, locking states
of all the control signals, including IE.
Closes https://github.com/espressif/esp-idf/issues/1931
Closes https://github.com/espressif/esp-idf/issues/2043
Previously the loop in esp_timer_impl_set_alarm was necessary to catch
the case when timer count wraps around (goes from 2^32 - 1 to 0).
Since ALARM_OVERFLOW_VAL was reduced from 2^32 - 1 to 0xefffffff,
this is no longer necessary.
Fixes https://github.com/espressif/esp-idf/issues/1891
Allows you to move the partition table, it gives more space for the bootloader.
Added a new utility - parttool.py. This utility can search for the offset and/or size of the partitions by name and type/subtype. Use for getting APP_OFFSET and PHY_DATA_OFFSET.
The linker(esp32.bootloader.ld) made changes that allow you to write a custom bootloader code more.
TW14125
