* Move smartconfig to its component directory, it should be possible to override
this as whole component
* Fix few header includes related to lwIP networking stack
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
1. fix issues on sending beacon caused by too much tx retries on other packets.
2. modify not to scan if rc exists when connect.
3. modify scan dwell time to default 120ms fo root.
1. fix a bug in initliazing map beacon interval.
2. fix not send MESH_EVENT_ROUTING_TABLE_REMOVE when MESH_NWK_CHILD_DISCONNECTED.
3. fix a bug in returning roots ie len.
The files updated according to code review discussions.
In the sleep_modes.c removed immidiate disable of ULP mode and leave just trigger deactivation.
The esp_sleep.h is updated to have the same defines for source as esp_sleep_wakeup_cause_t.
Updated documentation in sleep_modes.rst file to include cross references and address esp_sleep_wakeup_cause_t type.
The get_time_ms() is updated to explicitly use fabs(dt) instead of abs(dt) in test_sleep.c.
Some other minor changes in test_sleep.c unit test.
(TW#18952)
Closes https://github.com/espressif/esp-idf/issues/1677
It is not possible to generate 1 MHz REF_TICK from 2 MHz APB clock
(this is a limitation of REF_TICK divider circuit). Since switching
REF_TICK frequency is something we would like to avoid (to maintain
UART output even with DFS), 2 MHz frequency has been marked as
unsupported.
The issue would manifest itself in cases when switching from PM
configuration like {active=160MHz, idle=80MHz} to {active=80MHz,
idle=80Mhz}. After the configuration was changed, PM logic would
think that current frequency was 80MHz and would not do any further
switching. In fact, frequency was still 160MHz.
The old code calculated MAX() of two enum values, but CPU frequency
enum values are not ordered (2MHz goes after 240MHz). This caused
incorrect configuration to be set.
1. External 32kHz crystal is started for too long or it may not start at all. It is often observed at the first start.
2. At the first start, it is possible that the crystal did not start. And the recorded period was recorded as 0. Which led to a division error by zero during the transition to the deep sleep mode (Maybe somewhere else).
3. Added a unit test to test a new method of oscillation an external crystal.
4. Added a new method of oscillating of an external crystal. The legs of the crystal are fed with a 32 kHz frequency.
The new method eliminates these errors.
Added unit test: `\esp-idf\components\soc\esp32\test\test_rtc_clk.c`: `make TEST_COMPONENTS=soc`
- 8 Test starting external RTC crystal. Will pass.
`Bootstrap cycles for external 32kHz crystal` - is specified in the file Kconfig by default 100.
QA tested a new method of oscillation the crystal on 25 boards. The supply of square waves on the crystal showed a 100% result in contrast to the previous method of launching the crystal. After the tests, the old method was deleted.
Closes TW19143
- separate mode stats from lock stats by an extra comment line
- add CPU frequency column to the mode stats
- don’t print a row for light sleep if light sleep is not enabled
s_cpu_freq_by_mode array was statically initialised with 80MHz CPU
frequency in CPU_MAX and APB_MAX modes, but sdkconfig setting for the
CPU frequency could have been different. For the case of 240MHz CPU
frequency, this would cause a frequency switch between 240MHz and
80MHz to happen, even though such switch is not supported in the fast
path switching functions used by the DFS implementation.
This fixes the issue by moving initialisation into esp_pm_impl_init,
which is called at startup before the first mode switch can happen.
Fixes https://github.com/espressif/esp-idf/issues/1729.
