Assert when a new task is started on a nonexisting CPU
Previously, starting a task on a CPU ID higher than the amount of CPUs FreeRTOS is configured with would not start the task and possibly have unintended side effects due to some out-of-bounds array writes. Assert on this so the app aborts cleanly.
See merge request !701
esp32: update WiFi lib for ebuf sanity check fail issue
By default the WiFi canary check is disabled, before release 2.1, we only have canary check for AMPDU, in release2.1, we add sanity check for all kinds of dynamic ebuf, the checking is disabled by default for performance reason. We found some kinds of packets can't pass sanity check, this MR is to fix it.
See merge request !718
esp32/lwip: adjust some lwip options and update wifi lib
1. Modify TCP TX window from 2 to 4 to keep RX/TX window same size
２. Modify TCPIP task stack default size from 2048 to 2560 to avoid stack overflow
３. Update wifi lib for TCP performance optimization
See merge request !714
I2S driver - fixed support for 24 and 32-bits, fixed tx/rx at the same time
- Modify sample can test with 24, 32-bits audio
- Add i2s sample README
- simply i2s_push function
- change sample rates, bits per sample, channel on fly
See merge request !483
doc: Getting Started guides
* [x] Redesign ReadTheDocs home page to cover the following sections:
* Get Started (new + revised contents, see below)
* API Reference
* H/W Reference
* API Guides (former "What Else?")
* Contribute
* Resources
* [x] Convert "Getting Started" guides from PDF to RST, review and update
* ESP32-DevKitC Getting Started Guide
* ESP-WROVER-KIT Getting Started Guide
* [x] Review installation manuals for Windows, Linux and MacOS
* Separate "Standard / cookie cutter" contents from "Advanced / customize this installation" contents
* Harmonize "Standard" installation instructions by providing distinct sections
* (1) Install Prerequisites
* (2) Install Toolchain (binary only)
* (-) O/S flavors, ref to "Advanced" installation
* [x] Extract / update existing instructions common to all O/S - idf-template based
* (3) Get esp-idf
* (4) Start a Project
* (5) Connect
* (6) Build and Flash
* (7) Monitor
* [x] Correct partition table address from 0x4000 to 0x8000 in `docs/get-started/make-project.rst` and `README.md`
See merge request !612
Fix SPI master CI test
CI test fails because the values it checks haven't been updated to the changes in the clock calculations. This fixes that.
See merge request !710
Feature/btdm ble bt separa
@Jack @snake @igrokhotkov @angus @island please help to review the code.
Separate the bt/ble code. After the separate, can save 15k~25k ram & 240k~460k code size(depending on the menuconfig).
See merge request !684
optimize scan before station connecting to AP
1. Store the information of AP(ssid, password, bssid, channel, etc)
into nvs when station connects to AP successfully. If station
connects to the same AP next time, it will scan the stored channel of the AP
first.
2. Add a parameter of channel for scanning before connecting to AP.
If the channel is set to 0, station will scan full channels. If it
is set to 1~13, station will only scan the channel.
See merge request !704
1. Store the information of AP(ssid, password, bssid, channel, etc)
into nvs when station connects to AP successfully. If station
connects to the same AP next time, it will scan the stored channel of the AP
first.
2. Add a parameter of channel for scanning before connecting to AP.
If it is set to 1~13, station will scan starting from the channel.
If the channel of AP is unknown, set it to 0.
Even though RTC_CLK_CONFIG_DEFAULT correctly had RTC_FAST_FREQ_8M as the
fast clock, the bootloader modified fast_freq field to the currently
selected RTC_FAST_CLK (so that the clock choice is not affected by the
bootloader). The application startup code never switched to 8M clock,
which caused the default (XTAL/4) to be used as RTC_FAST_CLK. This had
caused a number of issues, such as touch pads not working in deep sleep.
Fixes https://github.com/espressif/esp-idf/issues/542.
Ref TW12053.
Split common SPI stuff out of master driver; add slave driver; add workaround for DMA issue.
This merge req mainly adds a slave device. In order to do this, the original master driver is refactored into common code shared by master and slave modes, and a slave driver is added.
The other things added are:
- Added a workaround for a 'feature' of the ESP32 silicon that can lock up the receive DMA channel in some situations. This can only be fixed by resetting *both* DMA channels. The workaround implemented makes sure that the reset only happens when both channels are idle
- Got rid of the automatic choice between register- and DMA-based transfers. The master (and slave) code will now always go for a DMA transfer if a DMA channel is given, and always go for register-based transfers if no DMA channel is given.
- Add in a bunch of fixes for outstanding Github issues.
See merge request !659
Add support 24, 32 bits
@jxmao optimize i2s_zero_buffer
@jxmao correct config support slave mode
@jxmao correct setup pin support tx/rx at the same time
Enhance pin power
@jxmao add dynamic change number of channels
remove nvs_init
remove start log and enhance power pin setup
using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params
validate i2s_bits_per_sample and channel
check tx & rx buffer before fill zero
remove checking channel as @jxmao suggest
limit dma buffer
modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512
Add support 24, 32 bits
reduce push function
Modify sample can test with 24, 32-bits
Add i2s sample README
Fixed i2s_set_clk got reset sometime
can changes bit-wide while running
Fix sample rate calculation for DAC mode from @jeroen
modify example can change bits per sample every 5 seconds
cleanup
add comment for bytes_per_sample
update as @angus suggestions
Add i2s_set_clk api
I2S driver bug fixed as following log:
@jxmao optimize i2s_zero_buffer
@jxmao correct config support slave mode
@jxmao correct setup pin support tx/rx at the same time
Enhance pin power
@jxmao add dynamic change number of channels
remove nvs_init
remove start log and enhance power pin setup
using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params
validate i2s_bits_per_sample and channel
check tx & rx buffer before fill zero
remove checking channel as @jxmao suggest
limit dma buffer
modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512
limit dma buffer to 4092
change gpio_matrix_*_check to inline function, remove some comments and rename test_i2s function to setup_triangle_sine_waves
for change commit title
esp32: Core dump sanity checks
Adds sanity checks when doing core dump to flash
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
Ref TW11879
See merge request !686
- CRC for core dump flash partition config
- Tasks with corrupted TCBs are skipped
- Assertions to check that nothing is written beyond core dump flash partition
add support for 32k XTAL as RTC_SLOW_CLK source
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
Ref TW11683.
Ref https://esp32.com/viewtopic.php?f=13&t=1570
Fixes https://github.com/espressif/esp-idf/issues/337.
See merge request !696
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
function can be used instead to get an approximate RTC_SLOW_CLK
frequency
- Clock calibration is performed at startup. The value is saved and used
for timekeeping and when entering deep sleep.
- When using the 32k XTAL, startup code will wait for the oscillator to
start up. This can be possibly optimized by starting a separate task
to wait for oscillator startup, and performing clock switch in that
task.
- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.
- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
error.
- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
slow_clk_cycles argument would exceed certain value
- Improve 32k XTAL oscillator startup time by introducing bootstrapping
code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
pins to set better initial conditions for the oscillator.
Add support 24, 32 bits
@jxmao optimize i2s_zero_buffer
@jxmao correct config support slave mode
@jxmao correct setup pin support tx/rx at the same time
Enhance pin power
@jxmao add dynamic change number of channels
remove nvs_init
remove start log and enhance power pin setup
using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params
validate i2s_bits_per_sample and channel
check tx & rx buffer before fill zero
remove checking channel as @jxmao suggest
limit dma buffer
modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512
Add support 24, 32 bits
reduce push function
Modify sample can test with 24, 32-bits
Add i2s sample README
Fixed i2s_set_clk got reset sometime
can changes bit-wide while running
Fix sample rate calculation for DAC mode from @jeroen
modify example can change bits per sample every 5 seconds
cleanup
add comment for bytes_per_sample
update as @angus suggestions
Add i2s_set_clk api
I2S driver bug fixed as following log:
@jxmao optimize i2s_zero_buffer
@jxmao correct config support slave mode
@jxmao correct setup pin support tx/rx at the same time
Enhance pin power
@jxmao add dynamic change number of channels
remove nvs_init
remove start log and enhance power pin setup
using enum for i2s_channel and i2s_bits_per_sample, return ESP_ERR_INVALID_ARG when check params
validate i2s_bits_per_sample and channel
check tx & rx buffer before fill zero
remove checking channel as @jxmao suggest
limit dma buffer
modify i2s pin back to gpio mux before configure gpio matrix, resolve github issue #512
limit dma buffer to 4092
change gpio_matrix_*_check to inline function, remove some comments and rename test_i2s function to setup_triangle_sine_waves
for change commit title
Fix secure boot enable - can verify bootloader image
Secure boot enable would fail because esp_image_basic_verify() would fail to verify the bootloader image.
* Failure prevented secure boot from enabling.
* Also adds unit test cases for esp_image_basic_verify()
Ref https://esp32.com/viewtopic.php?f=2&t=1602
TW11878
See merge request !693
