Commit graph

10 commits

Author SHA1 Message Date
Jeroen Domburg
76295c7a13 Fix timing adjustment needed for higher speeds of SPI master bus. 2017-03-28 11:31:59 +08:00
Jeroen Domburg
e35ebbf813 Use THRESH_DMA_TRANS define everywhere, make code match "smaller or equal" description 2017-02-21 18:27:56 +08:00
Lourens Naudé
04f7d96623 Fix SPI read edges in spi_intr
Signed-off-by: Jeroen Domburg <jeroen@espressif.com>
2017-02-21 18:26:03 +08:00
Dermot Duffy
33500f2561 Add missing variable initialisation.
Signed-off-by: Jeroen Domburg <jeroen@espressif.com>
2017-01-25 21:41:45 +08:00
Jeroen Domburg
356e01545c Add test for spi clock, fix corner cases) 2017-01-11 16:13:33 +08:00
Jeroen Domburg
daa2b7cbc9 n, h and l actually are 6-bit; they go from 1 to 64. 2017-01-11 14:13:37 +08:00
Jeroen Domburg
a98d07d650 Fix clock divider calculation 2017-01-11 13:01:48 +08:00
Jeroen Domburg
ee59fa75f4 Rename SPI Master IO pins to more common terminology, add better explanation to queue_length initialization value 2017-01-11 11:25:56 +08:00
Jeroen Domburg
5eb8eb3855 SPI master: rename transaction flags from SPI_* to SPI_TRANS_*, like the documentation says. Also add some explanation about the SPI signals in the documentation 2017-01-10 14:41:12 +08:00
Jeroen Domburg
23455de4c2 Add SPI Master driver, example, test and docs 2017-01-06 14:20:32 +08:00